Electronic package with fluid flow barriers

An electronic package comprising:

• a substrate having a plurality of contacts;
• an integrated circuit mounted to said substrate with solder bumps extending between bonding pads of said integrated circuit and a sub-portion of said plurality of contacts;
• a quantity of underfill deposited in a void defined between said integrated circuit and regions of said substrate in superimposition therewith;
• a plurality of capacitors solder attached to portions of said substrate lying outside of said regions;
• a fluid flow barrier formed on said substrate, wherein the fluid flow barrier comprises a plurality of baffles each extending above a surface of said substrate, wherein the fluid flow barrier is formed between said regions and said capacitors, and wherein dimensions of the fluid flow barrier are defined to allow a sub-portion of the quantity of underfill to egress from said regions and traverse completely across a top surface of an outermost baffle of the fluid flow barrier while preventing the sub-portion from contacting said capacitors during thermal heating of said package to facilitate reflow of said solder bumps.