Apparatus and method for controlling semiconductor die warpage

A semiconductor die comprising:

• means for increasing a coefficient of thermal expansion (CTE) of the semiconductor die, the CTE increasing means comprising a plurality of through substrate vias in each of four corners of the semiconductor die, each of the four corners of the semiconductor die including:
• an outer set of substrate vias arranged in an arc with the apex of the arc being aligned with a point of the corner in which the arc is located and an outer row of substrate vias extending outward from each of the ends of said arc in a direction parallel to a side edge of the semiconductor die along which the outer row of substrate vias extend, the CTE increasing means reducing warpage of the semiconductor die;
• and
• at least one additional non-signaling carrying through substrate via located in a central region proximate to a functional block of the semiconductor die.