Semiconductor chip, stack module, and memory card
AssigneeSamsung Electronics Co., Ltd.
InventorsHyong-ryol Hwang, Ho-cheol Lee, Byong-wook Na
Life of this patent
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Abstract
Provided are a semiconductor chip including a TSV passing through a transistor, and a stack module and a memory card using such a semiconductor chip. The semiconductor chip may include a semiconductor layer that has a first surface and a second surface opposite to each other. A conductive layer may be disposed on the first surface of the semiconductor layer. A TSV may pass through the semiconductor layer and the conductive layer. A side wall insulating layer may surround a side wall of the TSV in order to electrically insulate the semiconductor layer and the conductive layer from the TSV.
Claims20
A semiconductor device, comprising:
- an underlying component including a first pad;
- a first semiconductor chip stacked on the underlying component;
- and
- a second semiconductor chip stacked on the first semiconductor chip and including a second pad,
- wherein the first semiconductor chip includes:
- a semiconductor layer having a first surface and a second surface opposite to each other;
- a conductive electrode on the first surface of the semiconductor layer;
- a first insulating layer between the conductive electrode and the semiconductor layer to electrically insulate the conductive electrode from the semiconductor layer;
- a second insulating layer on the first surface of the semiconductor layer to cover the conductive electrode;
- a through-silicon via (TSV) passing through the semiconductor layer, the first insulating layer, an individual one of the conductive electrode, and the second insulating layer, the TSV electrically connecting the first pad of the underlying component with the second pad of the second semiconductor chip;
- and
- a sidewall insulating layer at least in part surrounding a sidewall of the TSV and electrically insulating the conductive electrode layer from the TSV.
A stack module, comprising:
- a module substrate;
- and
- a plurality of semiconductor chips stacked on the module substrate,
- wherein at least one semiconductor chip of the plurality of semiconductor chips includes:
- a semiconductor layer having a first surface and a second surface opposite to each other;
- a conductive electrode disposed on the first surface of the semiconductor layer;
- a first insulating layer interposed between the conductive electrode and the semiconductor layer to electrically insulate the conductive electrode from the semiconductor layer;
- a second insulating layer disposed on the first surface of the semiconductor layer to cover the conductive electrode;
- a through-silicon via (TSV) passing through the semiconductor layer the first insulating layer, an individual one of the conductive electrode, and the second insulating layer, and
- a sidewall insulating layer at least in part surrounding a sidewall of the TSV and electrically insulating the semiconductor layer and the conductive electrode from the TSV,
- wherein the at least one semiconductor chip is electrically connected to an adjacent semiconductor chip through the TSV.
A memory card, comprising:
- a housing;
- a memory chip disposed in the housing;
- and
- a controller chip disposed above or under the memory chip in the housing and controlling the memory chip,
- wherein the memory chip includes:
- a semiconductor layer having a first surface and a second surface opposite to each other;
- a conductive electrode disposed on the first surface of the semiconductor layer;
- a first insulating layer interposed between the conductive electrode and the semiconductor layer to electrically insulate the conductive electrode from the semiconductor layer;
- a second insulating layer disposed on the first surface of the semiconductor layer to cover the conductive electrode;
- a through-silicon via (TSV) passing through the semiconductor layer, the first insulating layer, an individual one of the conductive layer and the second insulating layer;
- and
- a sidewall insulating layer at least in part surrounding a sidewall of the TSV and electrically insulating the semiconductor layer and the conductive electrode from the TSV;
- wherein the memory chip is electrically connected to the controller chip through the TSV.
Dependencies are inferred from the claim text.