Semiconductor devices having multi-width isolation layer structures

A semiconductor device comprising:

• a semiconductor substrate including first and second opposing semiconductor faces and a plurality of trenches therein;
• a respective trench including a first semiconductor trench wall that extends into the semiconductor substrate, from the first face to a first depth from the first face;
• the respective trench further including a second semiconductor trench wall that extends into the semiconductor substrate, from a second depth that is deeper from the first face than the first depth to a third depth that is deeper from the first face than the second depth;
• and
• the respective trench still further including a third semiconductor trench wall that extends into the semiconductor substrate at a lesser slope than that of the first and second semiconductor trench walls, from the first semiconductor trench wall at the first depth to the second semiconductor trench wall at the second depth, the respective trench having a different width from the first face to the first depth compared to from the second depth to the third depth;
• and
• an isolation region in the trench, on the first, second and third semiconductor trench walls,
• wherein the isolation region comprises:
• a first insulation layer that lines the first semiconductor trench walls and fills the trenches between the second semiconductor trench walls;
• and
• a second insulation layer on the first insulation layer that fills the trenches between the first semiconductor trench walls.