Image pickup device with a plurality of pixels and an AD conversion circuit

An image pickup device comprising:

• an image pickup unit in which a plurality of pixels are arranged, each of the plurality of pixels having a photoelectric conversion device, the plurality of pixels outputting a first pixel signal corresponding to a reset level in a first time, the plurality of pixels outputting a second pixel signal corresponding to an amount of incident electromagnetic wave in a second time;
• and
• an analog-to-digital (AD) conversion circuit that outputs a digital difference signal corresponding to a difference between the first pixel signal and the second pixel signal, and wherein
• the AD conversion circuit comprises:
• a delay circuit that has a plurality of delay devices connected to each other, the plurality of delay devices delaying a pulse signal, the delay circuit outputting, from the plurality of delay devices, a first lower phase signal in response to the first pixel signal and a second lower phase signal in response to the second pixel signal;
• a latch unit that latches the first lower phase signal and the second lower phase signal output from the delay circuit;
• a lower counting unit that generates a first lower count signal in response to the first lower phase signal retained in the latch unit, the lower counting unit generating a second lower count signal in response to the second lower phase signal retained in the latch unit, the lower counting unit generating and outputting a lower difference signal including a flag signal in response to a difference between a count value based on the first lower count signal and a count value based on the second lower count signal;
• and
• a higher counting unit that generates a higher difference signal in response to a difference between a count value based on a first higher count signal output in response to the first pixel signal in a predetermined frequency from the delay circuit and a count value based on a second higher count signal output in response to the second pixel signal in a predetermined frequency from the delay circuit, the higher counting unit subtracting a predetermined number from the higher difference signal, or adding the predetermined number to the higher difference signal, based on the flag signal, the higher counting unit outputting the higher difference signal after subtraction or addition processing, and
• the latch unit, the lower counting unit, and the higher counting unit are arranged for every column or every plurality of columns in a pixel array of the image pickup unit.