Methods for fabricating semiconductor devices

A method for fabricating a semiconductor device, the method comprising:

• providing a substrate including an interlayer dielectric layer thereon, the substrate including a first region and a second region;
• sequentially forming a first hard mask pattern and a second hard mask pattern on the interlayer dielectric layer in the first and second regions;
• providing a first trench in the interlayer dielectric layer in the first region and providing a second trench in the interlayer dielectric layer in the second region using the first hard mask pattern and the second hard mask pattern as etch masks;
• filling the first trench and the second trench by providing a filler material on the interlayer dielectric layer and the second hard mask pattern in the first and second regions;
• exposing an upper portion of the second hard mask pattern by partially removing the filler material;
• removing the second hard mask pattern;
• removing remaining filler material from the first trench and the second trench;
• and
• forming a wiring by filling the first trench and the second trench with a conductive material.

A method of fabricating a semiconductor device, comprising:

• providing a first hard mask layer on an interlayer dielectric film and providing a second hard mask layer on the first hard mask layer, the second hard mask layer having etch selectivity relative to the first hard mask layer;
• forming a trench through the second hard mask layer, the first hard mask layer and the interlayer dielectric film, the trench forming a first opening through the first hard mask layer and the trench forming a second opening through the second hard mask layer, the first opening being larger in area that the second opening;
• filling the trench with a filler material, the filler material filling the trench in the interlayer dielectric film, and the first and second openings;
• removing the second hard mask layer;
• removing filler material from the trench;
• and
• filling the trench with a conductive material to form an inter-layer wiring.