Low-latency viterbi survivor memory architecture and method using register exchange, trace-back, and trace-forward
AssigneeBlackBerry Limited
InventorMartin Kosakowski
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Abstract
In various aspects, the disclosure describes systems and methods for decoding of convolutionally encoded signals representing, for example, telecommunications signals such as command or content signals used in digital telecommunications. In various embodiments such aspects of the disclosure provide systems and methods for improving the efficiency, speed, and power consumption of such processes by providing architectures and methods for processing various parts of the encoded data records in parallel, using multiple and optionally specially-designed, dedicated memory registers and multiplexers.
Claims25
A method, performed by a data processor, for processing electromagnetic signals representing convolutionally encoded data streams, the method comprising:
- while performing a trellis search of a convolutionally encoded data stream of bit length L, where L is an integer:
- storing decision bit data representing results of the trellis search for a first D bits of the convolutionally encoded data stream in a (D×N)-bit register accessible by the data processor, where D is an integer greater than zero and less than L, and ordering the decision bit data according to the results of the trellis search for the first D bits of the convolutionally encoded data stream;
- storing decision bits representing results of the trellis search for a subsequent L-D bits of the convolutionally encoded data stream in random access memory accessible by the data processor;
- and
- upon completion of the trellis search for the first D bits of the convolutionally encoded data stream, commencing a first trace-forward process of the results of the trellis search, starting with a (D+1)st bit of the convolutionally encoded data stream;
- and
- commencing at least one trace-back process to decode the stored decision bits in the random access memory corresponding to the (D+1)st through Lth bits of the convolutionally encoded data stream, and storing decoded bits determined by the at least one trace-back process in at least one last-in first-out (LIFO) register.
A system for processing electromagnetic signals representing convolutionally encoded data streams, the system comprising:
- at least one processor configured to execute a trellis search of one or more convolutionally encoded data streams of bit length L, where L is an integer;
- a (D×N)-bit data register for storage of decision bit data representing results of the trellis search provided by the at least one processor for a first D bits of each corresponding data stream, where D is an integer greater than zero and less than L, and the decision bit data stored in the (D×N)-bit data register re-orderable by the at least one processor according to the results of the trellis search for the first D bits of each corresponding data stream;
- a memory store configured for storage of decision bits representing results of the trellis search provided by the at least one processor for a subsequent L−D bits of each corresponding data stream;
- at least one (N×M)-bit trace-forward register for storage of trace-forward data provided by the at least one processor;
- and
- a trace-back logic unit configured to perform at least one trace-back process to decode the stored decision bits in the memory store.
Dependencies are inferred from the claim text.