Packages with passive devices and methods of forming the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Shang-Yun Hou, Der-Chyang Yeh, Shuo-Mao Chen, Chiung-Han Yeh, Yi-Jou Lin
Life of this patent
Estimating the term…
Abstract
A device includes a substrate, a metal pad over the substrate, and a passivation layer having a portion over the metal pad. A Post-Passivation Interconnect (PPI) line is disposed over the passivation layer and electrically coupled to the metal pad. An Under-Bump Metallurgy (UBM) is disposed over and electrically coupled to the PPI line. A passive device includes a portion at a same level as the UBM. The portion of the passive device is formed of a same material as the UBM.
Claims20
A device comprising:
- a die comprising:
- a substrate;
- a metal pad over the substrate;
- a passivation layer comprising a portion over the metal pad;
- a Post-Passivation Interconnect (PPI) line over the passivation layer and electrically coupled to the metal pad;
- and
- an Under-Bump Metallurgy (UBM) over and electrically coupled to the PPI line;
- a passive device comprises a portion at a same level as the UBM, wherein the portion of the passive device is formed of a same material as the UBM;
- and
- a polymer surrounding the die, wherein the passive device comprises a portion over and aligned to the polymer.
A device comprising:
- a die comprising:
- a semiconductor substrate;
- a metal pad over the semiconductor substrate;
- a passivation layer comprising a portion over the metal pad;
- and
- a metal pillar over the metal pad and extending into the passivation layer;
- a molding compound encircling the die;
- a first dielectric layer over the metal pillar, the passivation layer, and the molding compound;
- a Post-Passivation Interconnect (PPI) line over the first dielectric layer and electrically coupled to the metal pad through the metal pillar and a via in the first dielectric layer;
- a second dielectric layer comprising a portion over the PPI line;
- an Under-Bump Metallurgy (UBM) over and electrically coupled to the PPI line, wherein the UBM extends into the second dielectric layer;
- a solder region over and connected to the UBM;
- and
- a passive device comprising a first portion in the first dielectric layer, and a second portion over the second dielectric layer.
A device comprising:
- a substrate;
- a metal pad over the substrate;
- a passivation layer comprising a portion over the metal pad;
- a Post-Passivation Interconnect (PPI) line over the passivation layer and electrically coupled to the metal pad;
- an Under-Bump Metallurgy (UBM) over and electrically coupled to the PPI line;
- a molding compound comprises a portion at a side of the substrate, wherein the molding compound extends from a first level that is level with a bottom of the substrate to a second level higher than the metal pad;
- and
- a passive device comprises a portion at a same level as the UBM, wherein the passive device comprises a first portion overlapping the substrate, and a second portion overlapping the molding compound.
Dependencies are inferred from the claim text.