Method of forming a CMOS structure having gate insulation films of different thicknesses
AssigneeRenesas Electronics Corporation
InventorsNozomu Matsuzaki, Hiroyuki Mizuno, Masashi Horiguchi
Life of this patent
Estimating the term…
Abstract
The semiconductor integrated circuit device employs on the same silicon substrate a plurality of kinds of MOS transistors with different magnitudes of tunnel current flowing either between the source and gate or between the drain and gate thereof. These MOS transistors include tunnel-current increased MOS transistors at least one of which is for use in constituting a main circuit of the device. The plurality of kinds of MOS transistors also include tunnel-current reduced or depleted MOS transistors at least one of which is for use with a control circuit. This control circuit is inserted between the main circuit and at least one of the two power supply units.
Claims20
A semiconductor integrated circuit device comprising a first MOS transistor, and a second MOS transistor having a thickness of a gate insulative film is greater than a thickness of a gate insulation film of said first MOS transistor, wherein said first MOS transistor is for use with a logic circuit required to exhibit enhanced switching speed whereas said second transistor is for use with a circuit less in switching speed than said logic circuit while allowing a power supply of said first MOS transistor to be controlled independently of a power supply of said second MOS transistor.
A semiconductor integrated circuit device comprising a first MOS transistor having a first gate electrode, a first electrode and a second electrode, and a second MOS transistor with a second gate elect rode, a third electrode and a fourth electrode, wherein said first electrode is connected to a first potential, said second electrode is connected to said third electrode, and said fourth electrode is connected to a second potential, and wherein said first MOS transistor is less in gate insulation film thickness than said second MOS transistor.
A semiconductor integrated circuit device comprising,
- a first MOS transistor;
- a second MOS transistor having the same conductivity type with the first MOS transistor and providing a gate insulation film thickness being thicker than the first MOS transistor and a drain connected to the first MOS transistor;
- and
- a power supply line connected to a source of the second MOS transistor,
- wherein a control signal having a first state for allowing the second MOS transistor to be on-state and a second state for allowing the second MOS transistor to be off-state is applied to a gate of the second MOS transistor.
A semiconductor integrated circuit device comprising:
- a first MOS transistor;
- a second MOS transistor having the same conductivity type with the first MOS transistor and a drain connected to a source of the first MOS transistor;
- a power supply line connected to the source of the second MOS transistor, wherein a control signal having a first state for allowing the second MOS transistor to be on-state and a second state for allowing the second MOS transistor to be off-sate is applied to the gate of second MOS transistor;
- and
- a tunnel current generated between the gate and the source of the first MOS transistor is smaller than a tunnel current generated between the gate and the source of the first MOS transistor when a voltage difference between the respective sources of the first and the second MOS transistors is identical.
Dependencies are inferred from the claim text.