Flexible low power slew-rate controlled output buffer

An output buffer, comprising:

• a decoder having a first input for receiving a data signal, a second input for receiving a mode signal, a first output for providing first and second drive control signals, and a second output for providing third and fourth drive control signals, wherein said decoder provides selected ones of said first and third drive control signals in response to respective first and second states of said data signal when said mode signal is in a first state, and provides selected ones of said second and fourth drive control signals in response to said respective first and second states of said data signal when said mode signal is in a second state;
• a pullup driver having an input coupled to said first output of said decoder, and an output for providing a pullup drive signal to provide a high voltage on an output terminal both in a push-pull mode in response to said first drive control signal and in a current limited mode in response to said second drive control signal, wherein after a slewing period said pullup driver provides said pullup drive signal at a first predetermined voltage in said push-pull mode and at a voltage set by a first current source in said current limited mode;
• a pulldown driver having an input coupled to said second output of said decoder, and an output for providing a pulldown drive signal to provide a low voltage on said output terminal both in said push-pull mode in response to said third drive signal and in said current limited mode in response to said fourth drive signal, wherein after said slewing period said pulldown driver provides said pulldown drive signal at a second predetermined voltage in said push-pull mode and at a voltage set by a second current source in said current limited mode;
• and
• an output stage for providing a voltage on said output terminal in response to said pullup and pulldown drive signals.

A method of providing an output signal on an output terminal, comprising:

• activating a pullup drive signal to cause a pullup transistor to drive the output signal with a first slew rate indicated by a first slew rate control signal in a push-pull mode in response to a first drive control signal;
• activating said pullup drive signal to cause said pullup transistor to drive the output signal with substantially said first slew rate in a current limited mode in response to a second drive control signal;
• activating a pulldown drive signal to cause a pulldown transistor to drive the output signal with a second slew rate indicated by a second slew rate control signal in said push-pull mode in response to a third drive control signal;
• activating said pulldown drive signal to cause said pulldown transistor to drive the output signal with substantially said second slew rate in said current limited mode in response to a fourth drive control signal;
• and
• driving the output signal on the output terminal using said pullup and pulldown transistors selectively in response to said pullup and pulldown drive signals.