Processor emulation using speculative forward translation
AssigneeSony Computer Entertainment Inc.
InventorVictor Suba Miura
Life of this patent
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Abstract
A method and apparatus for processor emulation using speculative forward translation are disclosed. A potential candidate for forward translation is identified from one or more portions of target system code. A priority for forward translation is assigned to the potential candidate. It is determined whether the potential candidate is a valid candidate for forward translation. If valid, the potential candidate is translated with a host system to produce one or more corresponding blocks of translated code executable by the host system.
Claims24
A method for emulating a target system on a host system having one or more processors, the method comprising:
- a) identifying one or more potential candidates for forward translation from one or more portions of target system code, wherein said identifying the potential candidates includes searching for the potential candidates in an area of memory corresponding to a portion of target system code for which a translation request has been issued by a main execution thread;
- b) assigning a priority for forward translation to each of the potential candidates;
- c) determining whether the potential candidates are valid candidates for forward translation;
- and
- d) translating the potential candidates determined to be valid candidates with the host system to produce one or more corresponding blocks of translated code executable by the host system.
A host system for emulating a target system, the host system comprising:
- a processor module coupled to a memory;
- a main execution thread containing processor executable instructions adapted to be executed by the processor module;
- and
- a speculative forward translation thread containing processor executable instructions adapted to be executed by the processor module, wherein the speculative forward translation thread includes:
- a) an instruction that, when executed, identifies one or more potential candidates for forward translation from one or more portions of target system code, wherein, when executed, said instruction that identifies the potential candidates searches for the potential candidates in an area of memory corresponding to a portion of target system code for which a translation request has been issued by the main execution thread;
- b) an instruction that, when executed, assigns a priority for forward translation to each of the potential candidates;
- c) an instruction that, when executed, determines whether the potential candidates are valid candidates for forward translation;
- and
- d) an instruction that, when executed, translates the potential candidates determined to be valid candidates to produce one or more corresponding blocks of translated code executable by the host system.
Dependencies are inferred from the claim text.