Method and device for encoding of error correcting codes, and method and device for decoding of error correcting codes
AssigneeMitsubishi Electric Corporation
InventorsYoshikuni Miyata, Hideo Yoshida, Kazuo Kubo, Takashi Mizuochi
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Abstract
An error correction encoding device includes an outer encoding circuit that performs encoding processing for an outer code and an inner encoding circuit that performs encoding processing for an inner code. The inner encoding circuit includes an inner-encoding input circuit that performs interleaving processing in which a parallel input sequence is divided into lanes and in which a barrel shift is performed for each inner frame in the lanes. Thus, allocation ratios between an information sequence area and a parity sequence area are made uniform.
Claims10
An error correction encoding method, comprising:
- an outer encoding step of performing encoding processing for an outer code of a parallel input sequence;
- an inner encoding step of performing encoding processing for an inner code of the parallel input sequence;
- and
- an interleaving processing step of dividing the encoded parallel input sequence into lanes of a predetermined byte length greater than one, and performing a barrel shift based on an integer multiple of the predetermined byte length for each of a plurality of inner frames in the lanes, the integer multiple being greater than zero for at least one of the plurality of inner frames.
An error correction decoding method, comprising:
- an outer decoding step of performing decoding processing for an outer code of a parallel input sequence;
- an inner decoding step of performing decoding processing for an inner code of the parallel input sequence;
- and
- an interleaving processing step of dividing the decoded parallel input sequence into lanes of a predetermined byte length greater than one, and performing a barrel shift based on an integer multiple of the predetermined byte length for each of a plurality of inner frames in the lanes, the integer multiple being greater than zero for at least one of the plurality of inner frames.
An error correction encoding device, comprising:
- an outer encoding circuit that performs encoding processing for an outer code of a parallel input sequence;
- an inner encoding circuit that performs encoding processing for an inner code of the parallel input sequence;
- and
- an interleaving circuit that divides the encoded parallel input sequence into lanes of a predetermined byte length greater than one, and performs a barrel shift based on an integer multiple of the predetermined byte length for each of a plurality of inner frames in the lanes, the integer multiple being greater than zero for at least one of the plurality of inner frames.
An error correction decoding device, comprising:
- an outer decoding circuit that performs decoding processing for an outer code of a parallel input sequence;
- an inner decoding circuit that performs decoding processing for an inner code of the parallel input sequence;
- and
- an interleaving circuit that divides the decoded parallel input sequence into lanes of a predetermined byte length greater than one, and performs a barrel shift based on an integer multiple of the predetermined byte length for each of a plurality of inner frames in the lanes, the integer multiple being greater than zero for at least one of the plurality of inner frames.
Dependencies are inferred from the claim text.