An analysis system for a complex system that includes a plurality of modules including a particular module that regularly executes a built-in-test (BIT) to determine whether that particular module is operating correctly, wherein the BIT generates a BIT fault code when the particular module is determined not to be is operating correctly, the analysis system comprising:
- memory that stores BIT fault code (BITFC) data sequences comprising a BIT fault codes generated by the BIT and repair data for that module corresponding to the BITFC data sequences, wherein the repair data comprises actual fault condition found (FF) result data and no fault condition found (NFF) result data corresponding to the stored BIT fault code data sequences for the particular module;
- a first processor that generates a regression function for the particular module based on the stored built-in-test fault code (BITFC) data sequences and the repair data for the particular module, wherein the regression function correlates some particular ones of the BITFC data sequences with a finding of an actual fault condition found (FF) result at the particular module, and correlates other particular ones of the BITFC data sequences with a finding of no fault condition found (NFF) result at the particular module;
- and
- a second processor designed to load the regression function, load a new BITFC data sequence generated by the BIT at the particular module, and execute the regression function with respect to the new BITFC data sequence to generate either:
- a no-fault found (NFF) result that indicates that the new BITFC data sequence is not indicative of an actual fault condition at the particular module, or a fault found (FF) result that indicates that the new BITFC data sequence is indicative of an actual fault condition at the particular module,
- wherein the first processor processes the stored BIT fault code data sequences and the repair data to generate sorted words that are sorted by length and frequency, wherein each word corresponds to a plurality of symbols that are part of a symbol sequence, wherein each symbol is an identifier that corresponds to a particular BIT fault code, and wherein each word ranges between two and n symbols in length, where n is an integer.