Method and apparatus for virtual in-circuit emulation

An apparatus for use in testing one or more components of target hardware, the apparatus comprising:

• a queued state machine configured to:
• receive a plurality of scan segment operations generated by a plurality of target ICE managers of at least one ICE host, the plurality of target ICE managers associated with a plurality of components of the target hardware;
• schedule the scan segment operations, based at least in part on a scan chain of the target hardware, to form thereby a scheduled set of scan segment operations;
• and
• propagate the scheduled set of scan segment operations toward a processor configured for executing the scheduled set of scan segment operations for testing one or more devices of the target hardware.

A non-transitory computer readable storage medium storing instructions which, when executed by a processor, cause the processor to perform a method for use in testing one or more components of target hardware using In-Circuit Emulation (ICE), the method comprising:

• receiving a plurality of scan segment operations generated by a plurality of target ICE controllers of at least one ICE host, the plurality of target ICE controllers associated with a plurality of components of the target hardware;
• scheduling the scan segment operations, based at least in part on a scan chain of the target hardware, to form thereby a scheduled set of scan segment operations;
• and
• propagating the scheduled set of scan segment operations toward a processor configured for executing the scheduled set of scan segment operations for testing one or more components of the target hardware.