State machine moving from test control register update to idle
AssigneeTexas Instruments Incorporated
InventorLee D. Whetsel
Life of this patent
Estimating the term…
Abstract
Functional circuits and cores of circuits are tested on integrated circuits using scan paths. Using parallel scan distributor and collector circuits for these scan paths improves test access of circuits and cores embedded within ICs and reduces the IC's power consumption during scan testing. A controller for the distributor and collector circuits includes a test control register, a test control state machine and a multiplexer. These test circuits can be connected in a hierarchy or in parallel. A conventional test access port or TAP can be modified to work with the disclosed test circuits.
Claims3
A process of operating a state machine, comprising:
- A. moving the state machine to a reset state with an enable signal of one state;
- B. moving the state machine from the reset state to an idle state with a protocol signal and a clock signal;
- C. moving the state machine from the idle state to a select test control register state with a protocol signal and a clock signal;
- D. moving the state machine from the select test control register state to a shift test control register state with a protocol signal and a clock signal;
- E. moving data into a test control register by maintaining the state machine in the shift test control register state with a protocol signal and a clock signal;
- F. moving the state machine from the shift test control register state to an update test control register state with a protocol signal and a clock signal;
- and
- G. moving the state machine from the update test control register state to the idle state with a protocol signal and a clock signal.
Dependencies are inferred from the claim text.