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US 8,621,179 B2Granted
Method and system for partial evaluation of virtual address translations in a simulator
AssigneeIntel Corporation
InventorsBengt Werner, Fredrik Larsson
Life of this patent
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Abstract
A method and system for simulating in software a digital computer system by performing virtual to physical translations of simulated instructions is disclosed. The number of virtual to physical translations using hash lookups is reduced by analyzing sequences of the instructions for determining with high probability whether the memory accesses made by the instructions perform the same virtual to physical translation in order to reduce the number of necessary hash lookups to enable faster simulation performance.
Claims23
A method of simulating memory accesses comprising:
- simulating memory accesses with a software simulation system for simulating a computer system operating as an application on top of a host operating system, wherein the host operating system resides between the software simulation system and host hardware and moderates transactions between the software simulation system and the host hardware, wherein simulating memory accesses with the software simulation system includes:
- analyzing a sequence of simulated instructions of the software simulation system including a memory access made by a first simulated instruction of the sequence of simulated instructions using analyzer code;
- determining with at least a high probability that is less than 100%, based on analyzing the sequence of simulated instructions, that another memory access made by another simulated instruction in the sequence of simulated instructions is to access the same memory page as the memory access made by the first simulation instruction;
- after determining the another memory access is to access the same memory page, performing a virtual to physical translation to obtain a translated address for the memory access made by the first simulated instruction using a hash lookup that is implemented with a plurality of simulated instructions;
- and
- after determining the another memory access is to access the same memory page, performing the another memory access using the translated address and no hash lookup or need for privileged operating system support.
3 more elements
A system comprising:
- a software simulation system, included in at least one memory coupled to at least one processor and configured to simulate memory accesses, that is to operate as an application on top of a host operating system that resides between the software simulation system and host hardware and moderates transactions between the software simulation system and the host hardware, the software simulation system further including:
- means for analyzing a sequence of simulated instructions of the software simulation system including a memory access made by a first simulated instruction of the sequence of simulated instructions;
- means for determining with at least a high probability that is less than 100%, based on analyzing the sequence of simulated instructions, that another memory access, unequal to the memory access, made by another simulated instruction, unequal to the first simulated instruction, in the sequence of simulated instructions is to access the same memory page, but not the exact same memory address, as the memory access made by the first simulation instruction;
- means for performing a virtual to physical translation to obtain a translated address for the memory access made by the first simulated instruction using a hash lookup that is implemented with a plurality of simulated instructions after the means for determining determines the another memory access is to access the same memory page;
- and
- means for performing the another memory access using the translated address and no hash lookup attempt or need for privileged operating system support after the means for determining determines the another memory access is to access the same memory page.
3 more elements
A non-transitory computer readable storage medium having instructions stored thereon that when executed enable a system to:
- simulate memory accesses with a software simulation system operating as an application on top of a host operating system, wherein the host operating system resides between the software simulation system and host hardware and moderates transactions between the software simulation system and the host hardware such that the software simulation system operates without need for privileged operating system support, wherein the instructions to simulate memory accesses are to:
- analyze a sequence of simulated instructions of the software simulation system including a memory access made by a first simulated instruction of the sequence of simulated instructions using analyzer code;
- determine with at least a high probability that is less than 100%, based on analyzing the sequence of simulated instructions, that another memory access made by another simulated instruction in the sequence of simulated instructions is to access the same memory page as the memory access made by the first simulation instruction;
- and
- after determining the another memory access is to access the same memory page, perform a virtual to physical translation to obtain a translated address for the memory access made by the first simulated instruction using a hash lookup that is implemented with a plurality of simulated instructions;
- and
- after determining the another memory access is to access the same memory page, perform the another memory access using the translated address without any hash lookup.
4 more elements
A non-transitory computer readable storage medium with instructions that when executed enable an operating system-hosted simulator to simulate memory accesses by:
- analyzing simulated instructions including a first memory access by a first simulated instruction that is to access a memory page;
- determining with a high probability, based on analyzing the simulated instructions, a second memory access by a second simulated instruction is to access the memory page;
- and
- after determining the second memory access is to access the memory page, (a) performing a virtual to physical translation to obtain a translated address for the first memory access using a hash lookup;
- and (b) performing the second memory access using the translated address without any hash lookup;
- wherein the high probability is less than 100%.
3 more elements
Dependencies are inferred from the claim text.