US 8,621,159 B2 · Shared access memory scheme

Abstract

A memory device loops back control information from one interface to another interface to facilitate sharing of the memory device by multiple devices. In some aspects, a memory controller sends control and address information to one interface of a memory device when accessing the memory device. The memory device may then loop back this control and address information to another interface that is used by another memory controller to access the memory device. The other memory controller may then use this information to determine how to access the memory device. In some aspects a memory device loops back arbitration information from one interface to another interface thereby enabling controller devices that are coupled to the memory device to control (e.g., schedule) accesses of the memory device.

Claims45

Dependent claims

A memory controller device, comprising:

a first memory interface configured to receive first control information from a first memory device, wherein the first control information indicates that another memory controller device accesses the first memory device;
a second memory interface;
and
an access control circuit configured to access the first memory device via the first memory interface based on the first control information, and further configured to access a second memory device via the second memory interface.

1 more element

Dependencies are inferred from the claim text.

Shared access memory scheme

Life of this patent

Shared access memory scheme

Life of this patent

Abstract

Claims45