Virtualizing processor memory protection with “L1 iterate and L2 swizzle”
AssigneeVMware, Inc.
InventorsHarvey Tuch, Prashanth P. Bungale, Scott W. Devine, Lawrence S. Rogel
Life of this patent
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Abstract
Methods for providing shadow page tables that virtualize processor memory protection. In one embodiment, two shadow L2 page tables are maintained for each section, for example, each 1 MB section, of guest address space covered by a shadow L1 descriptor.
Claims12
In a computing system comprised of a processor and virtualization software including a guest operating system (OS) that utilizes a guest domain access control register (DACR) containing domain access information and guest page tables including first level page tables (L1 page tables) and second level page tables (L2 page tables), which guest page tables contain (a) domain identifiers used to obtain domain access information from the guest DACR and (b) access permission information, wherein the domain access information and the access permission information are combined to provide an effective guest access permission;
- the virtualization software providing a shadow page table, wherein:
- (a) domain identifiers in the shadow page table are used to identify domain access information in the processor DACR that are mapped from the domain access information in the guest DACR;
- and (b) access permissions in the shadow page table that are mapped from the effective access permission information in the guest page tables and guest DACR;
- a memory management unit (MMU) in the processor traverses the shadow page table, accesses the processor DACR, and combines the mapped domain access information in the processor with the mapped access permission in the shadow page table to reflect the guest intended effective access permissions while isolating the guest from the virtualization software;
- the shadow page table comprises a shadow privilege page table that is traversed by the MMU when the guest operates in privileged mode and a shadow user page table that is traversed by the MMU when the guest operates in user mode;
- wherein:
- the shadow page table comprises shadow L1 page tables and shadow L2 page tables;
- and each L2 page table is identified by the following tuple:
- guest L1 descriptor value *{User, Privileged}*{Client, Manager} wherein:
- (a) the guest L1 descriptor value identifies a guest section the shadow L2 page table may back;
- (b) {User, Privileged} (referred to as L2-us-pr) indicates whether the shadow L2 descriptor may be referenced by a shadow L1 descriptor used when the guest is executing in user mode or a shadow L1 descriptor used when the guest is executing in privileged mode;
- and (c) {Client, Manager} (referred to as L2-dom) matches the domain access value implied by any referencing shadow L1 descriptor in the current shadow page table with the current guest DACR,
- a method for providing shadow page tables and processor DACR settings that virtualize processor memory protection, which method comprises:
- the virtualization software maintaining two shadow L2 page tables for each section of guest address space covered by a shadow L1 descriptor, wherein for a specific shadow L1 descriptor having a specific domain access value, the virtualization software sets the specific shadow L1 descriptor to point to one corresponding shadow L2 page table when the specific domain access value is Client access, and point to the other corresponding shadow L2 page table when the specific domain access value is Manager access.
Dependencies are inferred from the claim text.