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US 8,621,113 B2Granted
Apparatus including host bus adapter and serial attachment programming compliant device and related methods
AssigneeMicron Technology, Inc.
InventorsMichael A. Erdmann, Keith J. Lunzer, Joseph M. Jeddeloh
Life of this patent
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Abstract
Memory system controllers can include a host bus adapter (HBA) and a serial advanced technology attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device.
Claims21
An apparatus, comprising:
- a host bus adapter (HBA);
- and
- a serial attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device;
- wherein the function-specific interconnect is configured to operate a command interface, a response interface, and an information interface concurrently in response to a first command protocol and atomically in response to a second command protocol.
1 more element
A method, comprising:
- transferring a command between a host bus adapter (HBA) and a serial attachment (SA) programming compliant device;
- transferring a response between the HBA and the SA programming compliant device simultaneously with the command;
- transferring other information between the HBA and the SA programming compliant device simultaneously with the command;
- and
- qualifying an order of information delivery and communicating completions to the HBA based on input from a command finite state machine, a write finite state machine, and a read finite state machine.
2 more elements
An apparatus, comprising:
- a host bus adapter (HBA), including a plurality of direct memory access (DMA) devices configured to provide concurrent delivery of a command via a command output, receipt of a response via a response input, delivery of write information via a write information output, and receipt of read information via a read information input;
- and
- a serial attachment (SA) programming compliant device, including:
- a command input coupled to the command output;
- a response output coupled to the response input;
- a write information input coupled to the write information output;
- and
- a read information output coupled to the read information input.
5 more elements
An apparatus, comprising:
- a host bus adapter (HBA), including:
- a command output;
- a response input;
- a write information output;
- and
- a read information input;
- and
- a serial attachment (SA) programming compliant device, including a plurality of finite state machines (FSMs) configured to provide concurrent receipt of a command via a command input coupled to the command output, delivery of a response via a response output coupled to the response input, receipt of write information via a write information input coupled to the write information output, and delivery of read information via a read information output coupled to the read information input.
5 more elements
A method, comprising:
- transferring a command between a host bus adapter (HBA) and a serial attachment (SA) programming compliant device via a command interface between the HBA and the SA programming compliant device;
- transferring a response between the HBA and the SA programming compliant device simultaneously with the command via a response interface between the HBA and the SA programming compliant device;
- transferring other information between the HBA and the SA programming compliant device simultaneously with the command via an information interface between the HBA and the SA programming compliant device;
- and
- operating the command interface, the response interface, and the information interface atomically in response to a second command protocol.
2 more elements
An apparatus, comprising:
- a host bus adapter (HBA) including:
- a command fetcher;
- a response receiver;
- a downstream direct memory access (DMA) device;
- and
- an upstream DMA device;
- and
- a serial attachment (SA) programming compliant device coupled to the HBA via a function-specific interconnect configured to simultaneously transfer a command, a response, and other information between the HBA and the SA programming compliant device;
- wherein the SA programming compliant device includes:
- a device-to-host (DH) arbiter;
- a command finite state machine (FSM) coupled to the DH arbiter;
- a write FSM coupled to the DH arbiter;
- and
- a read FSM coupled to the DH arbiter;
- and
- wherein the DH arbiter is configured to qualify an order of information delivery and communicate completions to the HBA based on input from the command FSM, the write FSM, and the read FSM.
13 more elements
Dependencies are inferred from the claim text.