Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitry

A digital signal processing (“DSP”) circuit block comprising:

• a first multiplier circuit that can perform a first N bit by N bit (“N×N”) multiplication;
• a second multiplier circuit that can perform a second N×N multiplication;
• first shifter circuitry for shifting outputs of the first multiplier circuit by a selectable one of (1) zero bit positions and (2) N bit positions toward greater arithmetic significance;
• first compressor circuitry for additively combining outputs of the first shifter circuitry and the second multiplier circuit;
• circuitry for routing outputs of the first compressor circuitry to a first other DSP circuit block that is adjacent to the DSP circuit block;
• and
• second compressor circuitry for additively combining outputs of the first compressor circuitry and outputs received from a second other DSP circuit block that is adjacent to the DSP circuit block.