Memory circuits, systems, and methods for accessing the memory circuits
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsAtul Katoch, Cormac Michael O'Connell
Life of this patent
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Abstract
A memory circuit includes at least one memory cell for storing a charge representative of a datum. The memory cell is coupled with a word line and a bit line. A sense amplifier is coupled with the bit line. The sense amplifier is capable of precharging the bit line to a first voltage that is substantially equal to and higher than a threshold voltage (Vt) of a first transistor of the sense amplifier.
Claims20
A memory circuit comprising:
- at least one memory cell for storing a charge representative of a datum, the memory cell being coupled with a word line and a bit line;
- and
- a sense amplifier coupled with the bit line, the sense amplifier being capable of precharging the bit line to a first voltage that is substantially equal to or higher than a threshold voltage (Vt) of a first transistor of the sense amplifier, wherein a gate of the first transistor is coupled with the bit line, and a first source/drain of the first transistor is electrically coupled with a global bit line.
A system comprising:
- a memory circuit comprising:
- at least one memory cell for storing a charge representative of a datum, the memory cell being coupled with a word line and a bit line;
- and
- a sense amplifier coupled with the bit line, the sense amplifier being capable of precharging the bit line to a first voltage that is substantially equal to or higher than a threshold voltage (Vt) of a first transistor of the sense amplifier, a gate of the first transistor is coupled with the bit line, and a first source/drain of the first transistor is electrically coupled with a global bit line;
- and
- a processor coupled with the memory circuit for accessing the datum stored in the at least one memory cell.
A method for accessing a datum represented by a charge stored in at least one memory cell of a memory circuit, the method comprising:
- precharging a bit line coupled with the at least one memory cell to a first voltage that is substantially equal to or higher than a threshold voltage (Vt) of a sensing device of a sense amplifier, wherein precharging the bit line comprises selective coupling and decoupling a global bit line and a signal line by controlling a transistor using the bit line, a gate of the transistor connected to the bit line, a first source/drain of the transistor electrically connected to the global bit line.
Dependencies are inferred from the claim text.