Three-device non-volatile memory cell

A memory array comprising:

• a set of read lines intersecting a set of bit lines;
• a set of program lines intersecting said set of bit lines;
• and
• memory cells disposed at intersections between said intersecting set of bit lines, each of said memory cells comprising:
• a program resistive device connected to one of said program lines;
• a read resistive device connected to one of said read lines;
• and
• a bit resistive device connected to one of said bit lines;
• in which the program resistive device, read resistive device, and bit resistive device are coupled to a common conductor.

A method for storing data in a memory array comprising a number of memory cells, the method comprising:

• applying half of a program voltage to a program line connected to a program resistive device of a target memory cell within said memory array, a terminal of said program resistive device being connected to a read resistive device and a bit resistive device;
• applying an inverted half of said program voltage to a bit line connected to said bit resistive device;
• and
• connecting a read line connected to said read resistive device to ground.