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US 8,619,454 B2Granted
Semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Jun Koyama, Kiyoshi Kato
Life of this patent
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Abstract
An object of the present invention is to provide a semiconductor device combining transistors integrating on a same substrate transistors including an oxide semiconductor in their channel formation region and transistors including non-oxide semiconductor in their channel formation region. An application of the present invention is to realize substantially non-volatile semiconductor memories which do not require specific erasing operation and do not suffer from damages due to repeated writing operation. Furthermore, the semiconductor device is well adapted to store multivalued data. Manufacturing methods, application circuits and driving/reading methods are explained in details in the description.
Claims26
A semiconductor device comprising:
- a substrate containing a semiconductor material;
- a semiconductor layer formed over the substrate;
- a first transistor comprising a first source electrode, a first drain electrode and a first gate electrode;
- a second transistor comprising a second source electrode, a second drain electrode and a second gate electrode, one of the second source electrode and the second drain electrode being electrically connected to the first gate electrode;
- and
- a third transistor comprising a third source electrode, a third drain electrode and a third gate electrode, one of the third source electrode and the third drain electrode being electrically connected to one of the first source electrode and the first drain electrode,
- wherein a channel formation region of the first transistor is provided in the substrate, and
- wherein a channel formation region of the second transistor is provided in the semiconductor layer formed over the substrate.
5 more elements
A semiconductor device comprising:
- a substrate containing a semiconductor material;
- a first transistor over the substrate, the first transistor comprising a first impurity region and a second impurity region each formed in the substrate, and a first gate electrode;
- a first insulating layer over the first transistor;
- a second insulating layer over the first insulating layer;
- a third insulating layer over the second insulating layer;
- a semiconductor layer over the third insulating layer;
- embedded conductive layers embedded in the second insulating layer;
- electrode layers each configured to electrically connect one of the first gate electrode, the first impurity region and the second impurity region to a corresponding one of the embedded conductive layers through the first insulating layer;
- a second transistor formed over the first insulating layer and comprising a second source electrode, a second drain electrode and a second gate electrode, one of the second source electrode and the second drain electrode being electrically connected to the first gate electrode through one of the embedded conductive layers and one of the electrode layers;
- a third transistor comprising a third source electrode, a third drain electrode and a third gate electrode, one of the third source electrode and the third drain electrode being electrically connected to one of the first impurity region and the second impurity region,
- wherein a channel formation region of the first transistor is provided in the substrate between the first impurity region and the second impurity region, and
- wherein a channel formation region of the second transistor is provided in the semiconductor layer formed over the third insulating layer, and overlaps another of the embedded conductive layers with the third insulating layer interposed therebetween.
9 more elements
A semiconductor device comprising:
- a substrate containing a semiconductor material;
- a semiconductor layer formed over the substrate;
- a driver circuit;
- a reading circuit;
- a potential generating circuit configured to supply a writing potential to the driver circuit and a reference potential to the reading circuit;
- a first transistor comprising a first source electrode, a first drain electrode and a first gate electrode, one of the first source electrode and the first drain electrode being electrically connected to the reading circuit;
- a second transistor comprising a second source electrode, a second drain electrode and a second gate electrode, one of the second source electrode and the second drain electrode being electrically connected to the first gate electrode;
- and
- a capacitor comprising a first electrode and a second electrode, the first electrode being electrically connected to the first gate electrode and the second electrode being electrically connected to the driver circuit,
- wherein the reading circuit is configured to compare a potential of the one of the first source electrode and the first drain electrode to the reference potential,
- wherein a channel formation region of the first transistor is provided in the substrate, and
- wherein a channel formation region of the second transistor is provided in the semiconductor layer formed over the substrate.
9 more elements
A semiconductor device comprising:
- a substrate containing a semiconductor material;
- a driver circuit;
- a reading circuit;
- a potential generating circuit configured to supply a writing potential to the driver circuit and a reference potential to the reading circuit;
- a first transistor over the substrate, the first transistor comprising a first impurity region and a second impurity region each formed in the substrate, and a first gate electrode, one of the first impurity region and the second impurity region being electrically connected to the reading circuit;
- a first insulating layer over the first transistor;
- a second insulating layer over the first insulating layer;
- a third insulating layer over the second insulating layer;
- a semiconductor layer over the third insulating layer;
- embedded conductive layers embedded in the second insulating layer;
- electrode layers each configured to electrically connect one of the first gate electrode, the first impurity region and the second impurity region to a corresponding one of the embedded conductive layers through the first insulating layer;
- a second transistor formed over the first insulating layer and comprising a second source electrode, a second drain electrode and a second gate electrode, one of the second source electrode and the second drain electrode being electrically connected to the first gate electrode through one of the embedded conductive layers and one of the electrode layers;
- and
- a capacitor comprising a first electrode and a second electrode, the first electrode being electrically connected to the first gate electrode;
- wherein the reading circuit is configured to compare a potential of the one of the first impurity region and the second impurity region to the reference potential,
- wherein a channel formation region of the first transistor is provided in the substrate between the first impurity region and the second impurity region, and
- wherein a channel formation region of the second transistor is provided in the semiconductor layer formed over the third insulating layer, and overlaps another of the embedded conductive layers with the third insulating layer interposed therebetween.
14 more elements
Dependencies are inferred from the claim text.