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US 8,619,081 B2Granted
Image processing apparatus and image processing method
AssigneeCanon Kabushiki Kaisha
InventorsAtsushi Ikeda, Wataru Suzuki
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AssigneeCanon Kabushiki Kaisha
InventorsAtsushi Ikeda, Wataru Suzuki
Estimating the term…
A deformation information transformation OK/NG discrimination unit determines whether or not it is possible to achieve a transformation equivalent to three-dimensional deformation information by only two-dimensional affine transformation. If it is possible to achieve this transformation, a two-dimensional bitmap generation unit generates a processed two-dimensional graphics image by applying the two-dimensional affine transformation equivalent to the transformation indicated by the three-dimensional deformation information to a two-dimensional graphics image.
An image processing apparatus comprising:
An image processing method comprising:
Dependencies are inferred from the claim text.
From the US filing history. Foreign family members aren’t listed.
Drawings are temporarily unavailable. Open the PDF at USPTO
Geometric effects: perspective computation
Geometric image transformations in the plane of the image: affine transformations
Image data processing or generation, in general
About 5 years 5 months of term left · ends 30 Mar 2032 (estimated)
1. Field of the Invention
The present invention relates to a technique for generating a two-dimensional graphics image.
2. Description of the Related Art
FIG. 1 is a block diagram showing an example of the hardware arrangement of a rendering apparatus 100;
FIG. 2 is a block diagram showing an example of the functional arrangement of the rendering apparatus 100;
FIG. 3 is a flowchart of processing for generating a two-dimensional graphics image and outputting the image to a monitor 105;
Embodiments of the present invention will be described hereinafter with reference to the accompanying drawings. Note that each of the embodiments to be described hereinafter is an example when the present invention is practiced, and is one of practical embodiments of the arrangement described in the scope of the claims.
FIG. 1 is a block diagram showing an example of the hardware arrangement of a rendering apparatus 100 as an image processing apparatus according to this embodiment. A CPU 101 controls the overall rendering apparatus 100 using computer programs and data stored in a ROM 102 and RAM 103, and executes respective processes to be described later as those which are to be implemented by the rendering apparatus 100.
The ROM 102 stores setting data, a boot program, and the like of the rendering apparatus 100. The RAM 103 has an area used to temporarily store computer programs and data loaded from an external storage device 107, and also a work area used when the CPU 101 executes various processes. That is, the RAM 103 can provide various areas as needed.