Multiport amplifier and wireless device using the same
AssigneeMitsubishi Electric Corporation
InventorsMasatake Hangai, Kazutomi Mori, Kenichi Tajima, Yukihiro Tahara, Morishige Hieda
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AssigneeMitsubishi Electric Corporation
InventorsMasatake Hangai, Kazutomi Mori, Kenichi Tajima, Yukihiro Tahara, Morishige Hieda
Estimating the term…
A multiport amplifier and a wireless device using the same are obtained in which isolation among output terminals is improved, whereby the quality of communication is improved. The multiport amplifier includes an input hybrid, an output hybrid, a plurality of amplifiers and a plurality of gain and phase control circuits that are inserted between the input hybrid and the output hybrid, a plurality of output coupling circuits that are inserted between the output hybrid and a plurality of output terminals so that they receive output extraction signals corresponding to a plurality of output signals, and a feedback circuit including a frequency selection circuit that is inserted between the plurality of output coupling circuits and the plurality of gain and phase control circuits.
A multiport amplifier comprising:
Dependencies are inferred from the claim text.
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Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements: combinations of amplifiers, e.g. multi-channel…
Power amplifiers, e.g. Class B amplifiers, Class C amplifiers: of transmitter output stages
Amplifiers in which coupling networks have distributed constants, e.g. with waveguide resonators: combinations of several amplifiers
Indexing scheme relating to amplifiers: a hybrid coupler being used at the output of an amplifier circuit
About 3 years 5 months of term left · ends 31 Mar 2030 (estimated)
The present invention relates to a multiport amplifier having an error compensation circuit, and to a wireless device using the same.
A multiport amplifier is provided with an input hybrid, an output hybrid, and a plurality of amplifiers connected between them, wherein input signals having different frequency components are inputted to a plurality of input terminals of the input hybrid, and are distributed, amplified and combined, and output signals having frequency components different from those of the above-mentioned input signals are outputted from a plurality of output terminals of the output hybrid. As a result of this, the individual amplifiers are of an arrangement to amplify all the different frequency components, and hence, it is possible to decrease the deterioration of communication quality at the time of the failure of the amplifiers, as compared with an arrangement in which an amplifier is provided for each of the frequency components.
Conventionally, there has been proposed a hybrid matrix amplification system (multiport amplifier) which serves to compensate for a gain error and a phase error (for example, see a first patent document).
FIG. 1 is a block diagram showing the arrangement of a multiport amplifier according to a first embodiment of the present invention. (First Embodiment)
FIG. 2 is a block diagram showing another arrangement example of the multiport amplifier according to the first embodiment of the present invention. (First Embodiment)
FIG. 3 is a block diagram showing the arrangement of a multiport amplifier according to a second embodiment of the present invention. (Second Embodiment)
Hereinafter, preferred embodiments of the present invention will be explained while referring to the accompanying drawings.
FIG. 1 is a block diagram showing the arrangement of a multiport amplifier according to a first embodiment of the present invention, wherein an example of the multiport amplifier having an error compensation circuit with the number of ports being four is shown.
In FIG. 1, the multiport amplifier is provided with a signal generation circuit 1, a channel selection circuit 2, an input hybrid (input HYB) 3a, an output hybrid (output HYB) 3b, gain and phase control circuits (ΔG, Δφ) 4a through 4d, amplifiers 7a through 7d, output coupling circuits 8a through 8d, output terminals 9a through 9d, a frequency selection circuit 13a, a control signal generation circuit 14, and a channel assignment part 15, wherein it is constructed such that the plurality of amplifiers 7a through 7d are combined in parallel with one another.