Multi-stage digitally-controlled power amplifier
AssigneeMediatek Inc.
InventorsJie-Wei Lai, Meng-Hsiung Hung, Robert Bogdan Staszewski
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Abstract
A multi-stage digitally-controlled power amplifier (DPA) includes a radio-frequency (RF) clock input, an amplitude control word (ACW) input, a plurality of drivers, and an output stage. The RF clock input is arranged for receiving an RF clock. The ACW input is arranged for receiving a digital ACW signal. The drivers are coupled to the RF clock, and arranged for producing a plurality of intermediate signals, wherein at least one driver of the drivers is responsive to at least one bit of the digital ACW signal. The output stage is coupled to the intermediate signals, and arranged for producing an output signal.
Claims17
A multi-stage digitally-controlled power amplifier (DPA), comprising:
- a radio-frequency (RF) clock input, arranged for receiving an RF clock;
- an amplitude control word (ACW) input, arranged for receiving a digital ACW signal;
- a plurality of drivers, coupled to said RF clock, said drivers arranged for producing a plurality of intermediate signals, wherein at least one driver of said drivers is responsive to at least one bit of said digital ACW signal;
- and
- an output stage, coupled to said intermediate signals, said output stage arranged for producing an output signal.
A multi-stage digitally-controlled power amplifier (DPA), comprising:
- a radio-frequency (RF) clock input, arranged for receiving an RF clock;
- an amplitude control word (ACW) input, arranged for receiving a digital ACW signal;
- and
- a plurality of cells, arranged for producing an output signal according to said RF clock and said digital ACW signal, wherein part of said cells are arranged in a tree topology.
Dependencies are inferred from the claim text.