Current mirror and high-compliance single-stage amplifier
AssigneeXilinx, Inc.
InventorPatrick J. Quinn
Life of this patent
Estimating the term…
Abstract
A system for use within an integrated circuit (IC) can include an input differential pair including a positive input node and a negative input node, a current source coupled to the input differential pair, and a current mirror. The current mirror can include at least a first active device and a second active device. The system can include a biasing transistor device having a source terminal coupled to a gate terminal of each of the first and second active devices, a gate terminal coupled to a drain terminal of the second active device, and a drain terminal coupled to a voltage source. The biasing transistor device is complementary to the current mirror.
Claims20
A system for use within an integrated circuit, the system comprising:
- an input differential pair comprising a first input transistor device coupled in series with a first cascode input transistor device, and a second input transistor device coupled in series with a second cascode input transistor device, wherein a positive input node is coupled to a gate of the first input transistor device and a negative input node is coupled to a gate of the second input transistor device;
- a current source coupled to a gate of the first cascode input transistor device and a gate of the second cascode input transistor device, wherein the current source provides a predetermined bias current;
- a biasing field effect transistor device comprising a source terminal, a gate terminal, and a drain terminal, wherein the drain terminal is coupled to a voltage source;
- and
- a current mirror comprising a first active device and a second active device, wherein the first active device comprises a first transistor device, and the second active device comprises a second transistor device;
- wherein the biasing field effect transistor device is of a different doping type from that of the current mirror;
- and
- wherein a gate terminal of the first transistor device and a gate terminal of the second transistor device are coupled to the source terminal of the biasing field effect transistor device.
A current mirror system for use within an integrated circuit, the system comprising:
- a first active device and a second active device each comprising a gate terminal, a source terminal, and a drain terminal;
- wherein the source terminals of the first active device and the second active device are coupled together;
- wherein a drain terminal of the second active device is coupled to a current reference unit;
- wherein a drain terminal of the first active device comprises an output node;
- and
- a biasing transistor device comprising a source terminal coupled to a gate terminal of each of the first and second active devices, a gate terminal coupled to a drain terminal of the second active device, and a drain terminal coupled to a voltage source,
- wherein the biasing transistor device is complementary to the first and second active devices, and is of a different doping type from that of the first and second active devices.
A circuit, comprising:
- an input differential pair comprising a positive input node and a negative input node, wherein the input differential pair comprises N-type metal oxide semiconductor (NMOS) devices;
- a current source coupled to the input differential pair, wherein the current source is configured to provide a predetermined bias current for the circuit;
- a cascoded current mirror comprising P-type metal oxide semiconductor (PMOS) devices, the cascoded current mirror comprising a first PMOS device, a second PMOS device, a first cascode PMOS device, and a second cascode PMOS device having an output node;
- and
- a biasing NMOS device comprising a source terminal coupled to a gate terminal of each of the first PMOS device, the second PMOS device, and the second cascode PMOS device, a gate terminal coupled to a drain terminal of the second cascode PMOS device, and a drain terminal coupled to a voltage source.
Dependencies are inferred from the claim text.