Apparatus and method for through silicon via impedance matching

A method for matching impedances in a flip-chip circuit assembly, comprising:

• providing a die having a first circuit;
• forming a through silicon via (TSV) over the die;
• providing a second circuit, wherein the TSV conductively connects the first circuit and the second circuit;
• and
• forming a first impedance matching inductor connected in series between the TSV and second circuit.

A method for matching impedances in a flip-chip circuit assembly, comprising:

• step for providing a die having a first circuit;
• step for forming a through silicon via (TSV) over the die;
• step for providing a second circuit, wherein the TSV conductively connects the first circuit and the second circuit;
• and
• step for forming a first impedance matching inductor connected in series between the TSV and second circuit.

An apparatus for matching impedances in a flip-chip circuit assembly, comprising:

• a first circuit associated with a first die, the first die comprising a substrate;
• a means for conductively connecting, the means for conductively connecting to electrically connect the first circuit to a second circuit associated with a second die, wherein the means for conductively connecting comprises a conductive via and an insulator to insulate the conductive via from the substrate, wherein the means for conductively connecting is situated within the first die and passes completely through the substrate so as to have capacitive reactance;
• and
• a first means for impedance matching, the first means for impedance matching connected in series between the means for conductively connecting and the second circuit so as to compensate the reactive capacitance at a signal frequency.