Method of forming a micro-pattern for semiconductor devices

A method of forming a micro-pattern of semiconductor devices, the method comprising:

• providing a substrate that comprises a first region on which a narrow width pattern is to be formed and a second region on which a wide width pattern is to be formed;
• forming a first hard mask material film on the substrate;
• forming a narrow width mold mask pattern in the first region;
• forming a wide width mold mask pattern in the second region;
• forming a first spacer on side walls of the narrow width mold mask pattern;
• forming a second spacer on side walls of the wide width mold mask pattern;
• etching the first hard mask material film using the narrow width mold mask pattern, the wide width mold mask pattern, the first spacer, and the second spacer as etch masks;
• removing the narrow width mold mask pattern;
• and
• etching the first hard mask material film exposed by the removal of the narrow width mold mask pattern using the first spacer as an etch mask.

A method of forming an integrated circuit memory device, comprising:

• forming a target material layer on a substrate;
• forming a first mask layer on the target material layer and a second mask layer on the first mask layer;
• selectively etching the second mask layer to define a first pattern therein;
• forming sidewall spacers on opposing sidewalls of the first pattern;
• selectively etching the first mask layer to define a second pattern therein, using the first pattern and the sidewall spacers as an etching mask;
• selectively removing the first pattern to define an opening between the sidewall spacers;
• covering a first portion of the second pattern with a third mask layer;
• selectively reetching the first mask layer to convert a second portion of the second pattern into at least a third pattern, using the sidewall spacers as an etching mask;
• covering the third pattern with a fourth mask layer;
• selectively etching the first portion of the second pattern to thereby define a fourth pattern;
• and
• selectively etching the target material layer using the third pattern as an etching mask to define a plurality of word lines of the memory device and the fourth pattern as an etching mask to define a plurality of contact pads that are electrically connected to the plurality of word lines.