Reduced PTH pad for enabling core routing and substrate layer count reduction

A method, comprising:

• providing a substrate core having a resin rich outer layer;
• providing a copper foil over the resin rich outer layer;
• etching the copper foil to reduce its thickness;
• laser drilling the substrate core to create through holes to provide vertical paths through the core;
• providing a layer of copper plating;
• patterning the copper plating using a dry film resist to form trenches for forming trace lines and vias;
• filling with electrolytic copper to simultaneously fill the trace lines and vias and through holes to form plated through holes (PTHs), wherein the PTHs having a diameter of approximately 100 μm at a top and bottom side of the core and 60-90 μm at a center portion providing the hour glass shape;
• and
• proceeding to form dielectric build-up layers.