Semiconductor device including capacitor
AssigneeFujitsu Semiconductor Limited
InventorKenichi Watanabe
Life of this patent
Estimating the term…
Abstract
A substrate is provided with a first wiring layer 111, an interlayer insulating film 132 on the first wiring layer 111, a hole 112A formed in the interlayer insulating film, a first metal layer 112 covering the hole 112A, a second metal layer 113 formed in the hole 112A, a dielectric insulating film 135 on the first metal layer 112, and second wiring layers 114-116 on the dielectric insulating film 135, wherein the first metal layer 112 constitutes at least part of the lower electrode, an area, facing the lower electrode, of the second wiring layers 114-116 constitutes the upper electrode, and a capacitor 160 is constructed of the lower electrode, the dielectric insulating film 135 and the upper electrode P1.
Claims14
A manufacturing method of a semiconductor device, comprising:
- forming a first wiring layer above a semiconductor substrate;
- forming an insulating film above the first wiring layer;
- forming a first hole in the insulating film;
- forming a first metal on an internal surface of the first hole and on an upper surface of the insulating film, the first metal being connected to the first wiring;
- forming a second metal layer on the first metal layer in the first hole;
- forming a third metal layer on the first metal layer located on the upper surface of the insulating film;
- forming a dielectric insulating film on the third metal layer;
- and
- forming a second wiring layer on the dielectric insulating film,
- wherein the first hole is located in a first area outside of a second area where the third metal layer and the second wiring layer face each other;
- and
- the first metal layer located in the second area is flat.
A manufacturing method of a semiconductor device, comprising:
- forming a first wiring layer above a semiconductor substrate;
- forming an insulating film above the first wiring layer;
- forming a first hole in the insulating film;
- forming a first metal on an internal surface of the first hole and on an upper surface of the insulating film, the first metal being connected to the first wiring;
- forming a second metal layer on the first metal layer in the first hole;
- forming a third metal layer on the first metal layer located on the upper surface of the insulating film;
- forming a dielectric insulating film on the third metal layer;
- and
- forming a second wiring layer on the dielectric insulating film,
- wherein the first hole is located in a first area outside of a second area where the third metal layer and the second wiring layer face each other;
- and
- whole of the first metal layer located in the second area is located on the insulating film.
Dependencies are inferred from the claim text.