Reducing resistance in source and drain regions of FinFETs
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChen-Hua Yu, Yu-Rung Hsu, Chen-Nan Yeh, Cheng-Hung Chang
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Abstract
A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
Claims15
A method of forming a semiconductor structure, the method comprising:
- forming a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin comprises a middle section, and a first and a second end section on opposite ends of the middle section, and wherein the semiconductor fin has a first width;
- forming a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin;
- faulting a gate electrode on the gate dielectric layer;
- forming fin spacers on sidewalls of the first and the second end sections;
- recessing the first and the second end sections of the semiconductor fin to form recesses;
- removing portions of the fin spacers exposed through the recesses to enlarge the recesses, wherein the enlarged recesses have a second width greater than the first width;
- and
- re-growing a semiconductor material in the recesses.
A method of forming a semiconductor structure, the method comprising:
- providing a substrate;
- forming a semiconductor fin on a top surface of the substrate, wherein the semiconductor fin comprises a middle section, and a first and a second end section on opposite ends of the middle section;
- forming a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin, wherein the first and the second end sections are exposed;
- forming a gate electrode on the gate dielectric layer;
- forming fin spacers on sidewalls of the first and the second end sections;
- recessing at least top portions of the first and the second end sections to form recesses;
- removing at least portions of the fin spacers exposed through the recesses;
- and
- re-growing a semiconductor material in the recesses.
Dependencies are inferred from the claim text.