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US 8,617,946 B2Granted
Integrated circuits including metal gates and fabrication methods thereof
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Shi Liu, Chen-Hua Yu
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Abstract
A method of forming an integrated circuit is provided. The method includes forming a gate electrode of an NMOS transistor over a substrate by a gate-first process. A gate electrode of a PMOS transistor is formed over the substrate by a gate-last process.
Claims12
A method of forming an integrated circuit, the method comprising:
- forming a metallic gate electrode of an NMOS transistor and a dummy gate electrode of a PMOS transistor over a substrate;
- forming a dielectric layer surrounding the metallic gate electrode of the NMOS transistor and the dummy gate electrode of the PMOS transistor after the forming the metallic gate electrode of the NMOS transistor and the dummy gate electrode of the PMOS transistor;
- removing the dummy gate electrode of the PMOS transistor to form an opening after the formation of the dielectric layer;
- and
- forming a gate electrode of the PMOS transistor over the substrate within the opening;
- wherein the forming the metallic gate electrode of the NMOS transistor comprises:
- forming a first gate dielectric structure over the substrate;
- forming a first work function metallic layer over the first gate dielectric structure;
- forming a first silicon layer over the first work function metallic layer;
- and
- forming a silicide layer over the first silicon layer before forming the gate electrode of the PMOS transistor.
8 more elements
A method of forming an integrated circuit, the method comprising:
- forming a gate dielectric structure over a substrate;
- forming a first work function metallic layer over the gate dielectric structure;
- forming a silicon layer over the first work function metallic layer;
- forming a mask layer over the silicon layer;
- patterning the gate dielectric structure, the first work function metallic layer, the silicon layer, and the mask layer to form a first portion of the gate dielectric structure, a first portion of the first work function metallic layer, a first portion of the silicon layer, and a first portion of the mask layer for an NMOS transistor and to form a second portion of the gate dielectric structure, a second portion of the first work function metallic layer, a second portion of the silicon layer, and a second portion of the mask layer for a PMOS transistor;
- removing the first portion of the mask layer for exposing a surface of the first portion of the silicon layer;
- siliciding the surface of the first portion of the silicon layer;
- forming a dielectric layer around the second portion of the first work function metallic layer, the second portion of the silicon layer, and the second portion of the mask layer for a PMOS transistor;
- removing the second portion of the mask layer for exposing a surface of the second portion of the silicon layer;
- substantially removing the second portion of the silicon layer and the second portion of the first work function metallic layer for forming an opening;
- and
- forming a second work function metallic layer in the opening.
9 more elements
Dependencies are inferred from the claim text.