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US 8,605,523 B2Granted
Tracking capacitive loads
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsDerek C. Tao, Young Seog Kim, Kuoyuan (Peter) Hsu, Bing Wang, Annie-Li-Keow Lum
Life of this patent
Estimating the term…
Abstract
A time delay is determined to cover a timing of a memory cell in a memory macro having a tracking circuit. Based on the time delay, a capacitance corresponding to the time delay is determined. A capacitor having the determined capacitance is utilized. The capacitor is coupled to a first data line of a tracking cell of the tracking circuit. A first transition of the first data line causes a first transition of a second data line of the memory cell.
Claims20
A method comprising:
- determining a time delay to cover a timing of a memory cell in a memory macro having a tracking circuit;
- based on the time delay, determining a capacitance corresponding to the time delay;
- and
- utilizing a capacitor having the determined capacitance,
- wherein
- the determined capacitance of the capacitor affects a transition of a signal of a first data line of a tracking cell of the tracking circuit;
- and
- the transition of the signal of the of the first data line causes a first transition of a signal of a second data line of the memory cell.
5 more elements
A tracking circuit comprising:
- a first circuit;
- a first tracking cell;
- a first data line coupled to the first circuit and the first tracking cell;
- a second data line coupled to the first circuit;
- and
- a capacitive device coupled to the first data line,
- wherein
- the capacitive device is configured to have a capacitance that causes a predetermined time delay in a signal transition of the first data line,
- the signal transition of the first data line is configured to generate a signal transition of the second data line, and
- the signal transition of the second data line is configured to generate a signal transition of a memory cell.
7 more elements
A method comprising:
- generating a first transition of a signal of a first data line of a tracking cell coupled to a second data line of a tracking circuit;
- generating a first transition of a signal of the second data line based on the first transition of the signal of the first data line;
- generating a first transition of a signal of a third data line based on the first transition of the signal of the second data line and a first circuit configured to receive the second data line and provide the third data line;
- and
- generating a first transition of a signal of a fourth data line used in accessing a memory cell,
- wherein
- the signal of the second data line is affected by a capacitive load of at least one capacitor selected from the group consisting of a conductive line capacitor, a metal-oxide semiconductor capacitor, a diffusion capacitor, and a poly capacitor.
4 more elements
Dependencies are inferred from the claim text.