Parallel implementation of maximum a posteriori probability decoder
AssigneeThe MathWorks, Inc.
InventorsBrian Fanous, Halldor N. Stefansson
Life of this patent
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Abstract
A MAP decoder may be implemented in parallel. In one implementation, a device may receive an input array that represents received encoded data and calculate, in parallel, a series of transition matrices from the input array. The device may further calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector. The device may further calculate, in parallel and based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array.
Claims29
A method comprising:
- receiving an input array that represents received encoded data,
- the receiving being performed by at least one device;
- calculating, in parallel, a series of transition matrices from the input array,
- the calculating the series of transition matrices being performed by the at least one device;
- calculating, in parallel, products of cumulative products of the series of transition matrices and an initialization vector,
- the calculating the products of the cumulative products and the initialization vector being performed by the at least one device;
- calculating, in parallel, based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array,
- the calculating the output array being performed by the at least one device;
- and
- outputting the output array.
One or more non-transitory computer-readable media storing instructions, the instructions comprising:
- one or more instructions, which when executed by one or more processors, cause the one or more processors to receive input data that represents received encoded data;
- one or more instructions, which when executed by the one or more processors, cause the one or more processors to calculate, in parallel, cumulative products of a series of transition matrices from the received input data;
- one or more instructions, which when executed by the one or more processors, cause the one or more processors to calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector;
- one or more instructions, which when executed by the one or more processors, cause the one or more processors to generate, based on the products of the cumulative products of the series of transition matrices and the initialization vector, output data that corresponds to a decoded version of the received encoded data;
- and
- one or more instructions, which when executed by the one or more processors, cause the one or more processors to output the output data.
A device comprising:
- a first Maximum A Posteriori Probability (MAP) decoder, including:
- a first plurality of parallel execution units to calculate, in parallel:
- cumulative products of a first series of transition matrices, from a first input array,
- products of the cumulative products of the first series of transition matrices and a first initialization vector, and
- a first output array, based on the products of the cumulative products of the first series of transition matrices and the first initialization vector;
- a second MAP decoder, including:
- a second plurality of parallel execution units to calculate, in parallel:
- cumulative products of a second series of transition matrices, from a second input array,
- products of the cumulative products of the second series of transition matrices and a second initialization vector, and
- a second output array, based on the products of the cumulative products of the second series of transition matrices and the second initialization vector;
- and
- one or more interleavers to:
- interleave first data in the first output array and provide the interleaved first data to the first MAP decoder, and
- interleave second data in the second output array and to provide the interleaved second data to the second MAP decoder.
A method, implemented by at least one device, the method comprising:
- receiving an input array that represents received encoded data, where the receiving is performed by the at least one device;
- calculating, in parallel, a series of transition matrices from the input array, where the calculating the series of transition matrices is performed by the at least one device;
- calculating, in parallel, cumulative products of the series of transition matrices, where the calculating the cumulative products is performed by the at least one device;
- calculating, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector, where calculating the products of the cumulative products of the series of transition matrices and the initialization vector is performed by the at least one device;
- calculating, based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array, where the calculating the output array is performed by the at least one device;
- and
- outputting the output array.
One or more non-transitory computer-readable media storing instructions, the instructions comprising:
- one or more instructions which, when executed by one or more processors, cause the one or more processors to receive an input array that represents received encoded data;
- one or more instructions which, when executed by the one or more processors, cause the one or more processors to calculate, in parallel, a series of transition matrices from the input array;
- one or more instructions which, when executed by the one or more processors, cause the one or more processors to calculate, in parallel, cumulative products of the series of transition matrices;
- one or more instructions which, when executed by the one or more processors, cause the one or more processors to calculate, in parallel, products of the cumulative products of the series of transition matrices and an initialization vector;
- one or more instructions which, when executed by the one or more processors, cause the one or more processors to calculate, based on the products of the cumulative products of the series of transition matrices and the initialization vector, an output array that corresponds to a decoded version of the received encoded data in the input array;
- and
- one or more instructions, which when executed by one or more processors, cause the one or more processors to output the output array.
Dependencies are inferred from the claim text.