US 8,577,325 B2 · Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same

Abstract

Disclosed herein is a low noise amplifier having both ultra-high linearity and a low noise characteristic and a radio receiver including the low noise amplifier. The low noise amplifier includes a first main transistor unit, a first auxiliary transistor unit, and an optimum noise and input impedance matching capacitor. The first main transistor unit includes a first NMOS transistor and a first PMOS transistor configured to form a complementary common source amplifier, a feedback-type resistor connected between drains of the first NMOS transistor and the first PMOS transistor and configured to generate biases to the two transistors, and bias resistors connected to bodies of the first PMOS transistor and the first NMOS transistor. The first auxiliary transistor unit includes transistors connected to the two transistors. The optimum noise and input impedance matching capacitor is connected to output terminals of the first main transistor unit and the first auxiliary transistor unit.

Claims20

Dependent claims

A low noise amplifier having both ultra-high linearity and a low noise characteristic, comprising:

a first main transistor unit comprising a first NMOS transistor and a first PMOS transistor configured to faun a complementary common source amplifier, a feedback-type resistor connected in parallel between drains of the first NMOS transistor and the first PMOS transistor and configured to generate biases to the two transistors, and bias resistors connected to bodies of the first PMOS transistor and the first NMOS transistor;
a first auxiliary transistor unit comprising transistors connected in parallel to the two transistors of the first main transistor unit;
and
an optimum noise and input impedance matching capacitor CL connected in common to output terminals of the first main transistor unit and the first auxiliary transistor unit.

1 more element

A radio receiver, comprising a low noise amplifier for amplifying an input wireless signal;

a mixer for down-converting a frequency of an output signal of the low noise amplifier circuit;
an analog to digital converter (ADC) for converting an output signal of the mixer into a digital signal;
and a digital signal processor for recovering data from the digital signal,
wherein the low noise amplifier comprises:
a first main transistor unit comprising a first NMOS transistor and a first PMOS transistor configured to form a complementary common source amplifier, a feedback-type resistor connected in parallel between drains of the first NMOS transistor and the first PMOS transistor and configured to generate biases to the two transistors, and bias resistors connected to bodies of the first PMOS transistor and the first NMOS transistor;
a first auxiliary transistor unit comprising transistors connected in parallel to the two transistors of the first main transistor unit;
and
an optimum noise and input impedance matching capacitor CL connected in common to output terminals of the first main transistor unit and the first auxiliary transistor unit.

5 more elements

Dependencies are inferred from the claim text.

Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same

Life of this patent

Low noise amplifier having both ultra-high linearity and low noise characteristic and radio receiver including the same

Life of this patent

Abstract

Claims20