Hidden refresh method and operating method for pseudo SRAM
AssigneeUnited Microelectronics Corp.
InventorsShih-Chin Lin, Pei-Geng Ma, Yen-Hsueh Huang
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Abstract
In an exemplary hidden refresh method for a pseudo SRAM, a system clock is received. A duty-on period of the system clock signal is adapted for performing a data access operation such as write or read operation. A refresh clock signal subjected to the control of the system clock signal is generated. A duty-on period of the refresh clock signal is non-overlapped with the duty-on period of the system clock signal. A refresh control pulse then is triggered by a starting edge of the duty-on period of the refresh clock signal to activate a word line, for performing a refresh operation.
Claims20
A hidden refresh method for a pseudo SRAM, comprising:
- receiving a system clock signal, wherein a duty-on period of the system clock signal is adapted for performing a data access operation;
- generating a refresh clock signal subjected to the control of the system clock signal, wherein a duty-on period of the refresh clock signal is non-overlapped with the duty-on period of the system clock signal;
- and
- triggering a refresh control pulse by a starting edge of the duty-on period of the refresh clock signal to activate a word line, for performing a refresh operation.
An operating method for a pseudo SRAM, comprising:
- activating a first word line subjected to the control of a system clock signal cooperative with a data access enable signal to perform a data access operation;
- generating a refresh clock pulse non-overlapping with any clock pulse of the system clock signal, immediately following the data access operation;
- triggering a first refresh control pulse by a starting edge of the refresh clock pulse to activate a second word line, for performing a refresh operation;
- and
- generating a second refresh control pulse after the starting edge of the first refresh control pulse to activate a sense amplifier, for performing the refresh operation.
A hidden refresh method for a pseudo SRAM, comprising:
- periodically generating a refresh clock pulse triggered by an ending edge of a duty-on period of a system clock signal;
- and
- performing a refresh operation row by row subjected to an enabling of a word line by the triggering of the periodically-generated refresh clock pulses.
Dependencies are inferred from the claim text.