Flash memory system capable of operating in a random access mode

A memory system comprising:

• a flash memory;
• and
• a memory controller coupled to the flash memory, operating to control the flash memory, wherein the flash memory comprises a random accessible memory including a memory cell array enabling a random access;
• and a NAND flash memory coupled to the random accessible memory,
• wherein the random accessible memory uses the NAND flash memory to program data in single-page units,
• wherein the memory controller includes a random access mode selection circuit, comprising a plurality of block selection transistors, configured to select when to implement the flash memory as a random accessible memory for conducting an execute-in-place function and when to implement the flash memory for storing normal data,
• wherein the random accessible memory comprises a 1-wordline string memory cell array that is operable in a random access mode, an X-decoder, a Y-decoder, and a sense amplifier circuit,
• wherein the NAND flash memory comprising a 32-wordline string memory cell array, an X-decoder, a Y-decoder, and a page buffer circuit, and
• the block selection transistors are turned on while programming data into the 1-wordline string memory cell array and the 1-wordline string memory cell array is programmed by the page buffer circuit, and the block selection transistors are turned off while reading data from the 1-wordline string memory cell array and the sense amplifier circuit reads data from the 1-wordline string memory cell array.