Decoder parameter estimation using multiple memory reads
AssigneeMarvell International Ltd.
InventorsXueshi Yang, Shashi Kiran Chilappagari
Life of this patent
Estimating the term…
Abstract
An apparatus including a memory array and control circuitry. The control circuitry is configured to, based at least on a plurality of read comparison results, determine a number of memory cells of the memory array that have threshold voltages that fall into each of a plurality of voltage ranges. The control circuitry is further configured to, based at least on the number of memory cells that have threshold voltages in each of the plurality of voltage ranges, estimate an offset amount that a center voltage between two threshold voltage distributions differs from a center reference voltage. The control circuitry is further configured to read one or more of the plurality of memory cells based at least in part on the estimated offset amount.
Claims20
An apparatus, comprising:
- a memory array;
- and
- control circuitry coupled to the memory array, wherein the control circuitry is configured to
- based at least on a plurality of read comparison results, determine a number of memory cells of the memory array that have threshold voltages that fall into each of a plurality of voltage ranges, wherein (i) N1 represents a number of memory cells of the memory array that have threshold voltages that fall into a first voltage range of the plurality of voltage ranges, (ii) N2 represents a number of memory cells of the memory array that have threshold voltages that fall into a second voltage range of the plurality of voltage ranges, and (iii) N represents a total number of memory cells of the memory array on which the plurality of read comparison results are based,
- determine (i) a first factor p1 that is based on a ratio of N1 and N, and (ii) a second factor p2 that is based on a ratio of N2 and N,
- based at least on (i) the number of memory cells that have threshold voltages in each of the plurality of voltage ranges and (ii) the first factor p1 and the second factor p2, estimate an offset amount that a center voltage between two threshold voltage distributions differs from a center reference voltage, and
- read one or more of the plurality of memory cells based at least in part on the estimated offset amount.
A method, comprising:
- based at least on a plurality of read comparison results, determining a number of memory cells that have threshold voltages that fall into each of a plurality of voltage ranges, wherein (i) N1 represents a number of memory cells that have threshold voltages that fall into a first voltage range of the plurality of voltage ranges, (ii) N2 represents a number of memory cells of the memory array that have threshold voltages that fall into a second voltage range of the plurality of voltage ranges, and (iii) N represents a total number of memory cells of the memory array on which the plurality of read comparison results are based;
- determining (i) a first factor p1 that is based on a ratio of N1 and N, and (ii) a second factor p2 that is based on a ratio of N2 and N;
- based at least on (i) the numbers of memory cells that have threshold voltages in each of the plurality of voltage ranges and (ii) the first factor p1 and the second factor p2, estimating an offset amount that a center voltage between two threshold voltage distributions differs from a center reference voltage used to read the plurality of memory cells;
- deriving information from the estimated offset amount;
- and
- reading one or more of the plurality of memory cells using the information derived from the estimated offset amount.
A system comprising:
- a memory device including a memory array;
- a memory controller coupled to the memory device and configured to
- receive from the memory device a plurality of comparison results resulting from a plurality of reads on a plurality of memory cells of the memory array using a plurality of read reference voltages, including a center reference voltage,
- based at least on the plurality of comparison results, determine a number of memory cells of the memory array that have threshold voltages that fall into each of a plurality of voltage ranges, wherein (i) N1 represent a number of memory cells of the memory array that have threshold voltages that fall into a first voltage range of the plurality of voltage ranges, (ii) N2 represent a number of memory cells of the memory array that have threshold voltages that fall into a second voltage range of the plurality of voltage ranges, and (iii) N represent a total number of memory cells of the memory array on which the plurality of read comparison results are based,
- determine (i) a first factor p1 that is based on a ratio of N1 and N, and (ii) a second factor p2 that is based on a ratio of N2 and N,
- based at least on the numbers of memory cells that have threshold voltages in each of the plurality of voltage ranges, estimate an offset amount that a center voltage between two distributions of the threshold voltages differs from the center reference voltage;
- derive information from the estimated offset amount, and
- cause the memory device to read one or more of the plurality of memory cells using information derived from the estimated offset amount.
Dependencies are inferred from the claim text.