Circuit and method for generating a reference level for a magnetic random access memory element
AssigneeQUALCOMM Incorporated
InventorsXiaochun Zhu, Xia Li, Wenqing Wu, Jung Pill Kim, Seung H. Kang
Life of this patent
Estimating the term…
Abstract
A method of establishing a reference level includes providing first and second non-overlapping paths from a first node to a second node, providing first and second reference magnetic random access memory (MRAM) elements in the first path, providing third and fourth reference MRAM elements in the second path, measuring a first value indicative of a resistance between the first node and the second node, and setting the reference level based at least in part on the measured value. Also an associated reference circuit.
Claims41
A method of establishing a reference level comprising:
- providing first and second non-overlapping paths from a first node to a second node;
- providing first and second reference magnetic random access memory (MRAM) elements in the first path;
- providing third and fourth reference MRAM elements in the second path;
- measuring a first value indicative of a resistance between the first node and the second node;
- and
- setting the reference level based at least in part on the measured value,
- wherein both of the first and second MRAM elements are in a parallel state or both of the first and second MRAM elements are in an antiparallel state.
A method of establishing a reference level comprising:
- providing at least first and second non-overlapping paths;
- providing at least first and second reference magnetic random access memory (MRAM) elements in the first path;
- providing at least third and fourth reference MRAM elements in the second path;
- measuring a first value indicative of a resistance of the first path;
- measuring a second value indicative of a resistance of the second path;
- and
- setting the reference level based at least in part on the first and second values.
A reference circuit for generating a reference level, the reference circuit comprising:
- first and second non-overlapping paths from a first node to a second node;
- first and second reference MRAM elements in the first path;
- third and fourth reference MRAM elements in the second path;
- and
- a measurement circuit receiving a first value indicative of a resistance between the first node and the second node and outputting the reference level based at least in part on the first value,
- wherein both of the first and second MRAM elements are in a parallel state or both of the first and second MRAM elements are in an antiparallel state.
A reference circuit for generating a reference level, the reference circuit comprising:
- at least first and second non-overlapping paths;
- at least first and second reference magnetic random access memory (MRAM) elements in the first path;
- at least third and fourth reference MRAM elements in the second path;
- and
- a controller for measuring a first value indicative of a resistance of the first path and for measuring a second value indicative of a resistance of the second path and for setting the reference level based at least in part on the first and second values.
A reference circuit for generating a reference level, the reference circuit comprising:
- first and second path means for connecting a first node and a second node;
- first and second reference MRAM elements in the first path means, the first and second MRAM elements both being in a parallel magnetic state or both being in an antiparallel magnetic state;
- third and fourth reference MRAM elements in the second path means;
- and
- determining means for receiving a first value indicative of a resistance between the first node and the second node and outputting the reference level based at least in part on the first value.
A reference circuit for generating a reference level, the reference circuit comprising:
- at least first and second non-overlapping path means for connecting a first node and a second node;
- at least first and second reference magnetic random access memory (MRAM) elements in the first path means;
- at least third and fourth reference MRAM elements in the second path means;
- control means for measuring a first value indicative of a resistance of the first path means and for measuring a second value indicative of a resistance of the second path means and for setting the reference level based at least in part on the first and second measured values.
A method of establishing a reference level comprising:
- steps for providing first and second non-overlapping paths from a first node to a second node;
- steps for providing first and second reference magnetic random access memory (MRAM) elements in the first path, the first and second MRAM elements both being in a parallel magnetic state or both being in an antiparallel magnetic state;
- steps for providing third and fourth reference MRAM elements in the second path;
- steps for measuring a first value indicative of a resistance between the first node and the second node;
- and
- steps for setting the reference level based at least in part on the measured value.
A method of establishing a reference level comprising:
- steps for providing at least first and second non-overlapping paths;
- steps for providing at least first and second reference magnetic random access memory (MRAM) elements in the first path;
- steps for providing at least third and fourth reference MRAM elements in the second path;
- steps for measuring a first value indicative of a resistance of the first path;
- steps for measuring a second value indicative of a resistance of the second path;
- and
- steps for setting the reference level based at least in part on the first and second measured values.
A reference circuit for generating a reference level, the reference circuit comprising:
- first and second non-overlapping paths from a first node to a second node;
- first and second reference MRAM elements in the first path;
- third and fourth reference MRAM elements in the second path;
- a first path intermediate node located between the first reference MRAM element in the first path and the second reference MRAM element in the first path electrically connected to a second path intermediate node located between the third reference MRAM element in the second path and the fourth reference MRAM element in the second path;
- and
- a measurement circuit receiving a first value indicative of a resistance between the first node and the second node and outputting the reference level based at least in part on the first value.
Dependencies are inferred from the claim text.