Liquid crystal display panel and liquid crystal display array substrate

A liquid crystal display array substrate comprising:

• a substrate;
• a plurality of first scan lines and a plurality of second scan lines being parallel and disposed on the substrate alternately;
• a plurality of data lines disposed on the substrate and interlaced with the scan lines;
• a plurality of first columns of pixel units being parallel and disposed on the substrate, each of the first columns of the pixel units having a plurality of first pixel structures arranged in a column direction and electrically connected to the first scan lines and the data lines respectively, each of the first pixel structures having a first storage capacitor, and the first storage capacitor having a first capacitance value;
• and
• a plurality of second columns of the pixel units being parallel and disposed on the substrate, the second columns of the pixel units and the first columns of the pixel units being arranged alternately, each of the second columns of the pixel units having a plurality of second pixel structures arranged in the column direction and electrically connected to the second scan lines and the data lines respectively, each of the second pixel structures having a second storage capacitor, and the second storage capacitor has a second capacitance value, wherein the second capacitance value is less than the first capacitance value.

A liquid crystal display panel comprising:

• a first substrate;
• a plurality of first scan lines and a plurality of second scan lines being parallel and disposed on the first substrate alternately;
• a plurality of data lines disposed on the first substrate and interlaced with the scan lines;
• a plurality of first columns of the pixel units being parallel and disposed on the first substrate, each of the first columns of the pixel units having a plurality of first pixel structures arranged in a column direction and electrically connected to the second scan lines and the data lines respectively, each of the first pixel structures having a first storage capacitor, and the first storage capacitor having a first capacitance value;
• a plurality of second columns of the pixel units being parallel and disposed on the first substrate, the second columns of the pixel units and the first columns of the pixel units being arranged alternately, each of the second columns of the pixel units having a plurality of second pixel structures arranged in the column direction and electrically connected to the first scan lines and the data lines respectively, each of the second pixel structures having a second storage capacitor, and the second storage capacitor having a second capacitance value, wherein the second capacitance value is less than the first capacitance value;
• a second substrate disposed opposite to the first substrate;
• and
• a liquid crystal layer disposed between the first substrate and the second substrate.

A liquid crystal display array substrate comprising:

• a substrate;
• a plurality of first scan lines and a plurality of second scan lines being parallel and disposed on the substrate alternately;
• a plurality of data lines disposed on the substrate and interlaced with the scan lines;
• a plurality of first columns of the pixel units being parallel and disposed on the substrate, each of the first columns of the pixel units having a plurality of first pixel structures arranged in a column direction and electrically connected to the second scan lines and the data lines respectively, each of the first pixel structures having a first storage capacitor, and the first storage capacitor having a first capacitance value;
• and
• a plurality of second columns of the pixel units being parallel and disposed on the substrate, the second columns of the pixel units and the first columns of the pixel units being arranged alternately, wherein each of the to second columns of the pixel units having a plurality of second pixel structures arranged in the column direction and electrically connected to the first scan lines and the data lines respectively, each of the second pixel structures having a second storage capacitor, and the second storage capacitor has a second capacitance value, wherein the second capacitance value is less than the first capacitance value.