Digital-to-analog converter (DAC) with common mode tracking and analog-to-digital converter (ADC) functionality to measure DAC common mode voltage
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsRobert Roze, Ronnie E. Owens
Life of this patent
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Abstract
A circuit includes a first circuit portion operable as a digital-to-analog converter (DAC) for generating a DAC common mode voltage signal (outp), a second circuit portion having a comparator for comparing the DAC common mode voltage (outp) against a received signal common mode voltage (vsumdc), the comparator providing a single bit output, and a single bit register configured to receive the single bit output of the comparator, the single bit output used to control a feedback circuit, the feedback circuit configured to control the DAC common mode voltage signal.
Claims20
A circuit, comprising:
- a first circuit portion operable as a digital-to-analog converter (DAC) for generating a DAC common mode voltage (outp);
- a second circuit portion having a comparator for comparing the DAC common mode voltage (outp) against a received signal common mode voltage (vsumdc), the comparator providing a single bit output;
- and
- a single bit register configured to receive the single bit output of the comparator, the single bit output used to control a feedback circuit, the feedback circuit configured to control the DAC common mode voltage signal.
A method for operating a circuit, comprising:
- converting a differential input signal to a single-ended common mode voltage (outp) using a digital-to-analog converter (DAC);
- comparing the single-ended common mode voltage (outp) against a received signal common mode voltage (vsumdc) using a comparator, the comparator providing a single bit output corresponding to the comparing of the single ended common mode voltage (outp) and the received signal common mode voltage (vsumdc);
- receiving the single bit output in a single bit register;
- and
- using the single bit output to control the single-ended common mode voltage (outp).
A serializer/deserializer (SERDES), comprising:
- a first circuit portion operable as a digital-to-analog converter (DAC) for generating a DAC common mode voltage (outp);
- a second circuit portion having a comparator for comparing the DAC common mode voltage (outp) against a received signal common mode voltage (vsumdc), the comparator providing a single bit output;
- and
- a single bit register configured to receive the single bit output of the comparator, the single bit output used to control a feedback circuit, the feedback circuit configured to control the DAC common mode voltage.
Dependencies are inferred from the claim text.