Cascaded class D amplifier with improved linearity

A method, comprising:

• receiving an analog input signal at an input node of a first stage;
• converting the analog input signal to a digital input signal;
• generating a first digital pulse width modulated signal based on the digital input signal;
• receiving, at a second stage, a first quantization error induced by the generation of the first digital pulse width modulated signal;
• scaling the first quantization error by a gain factor;
• generating a second digital pulse width modulated signal based on the scaling of the first quantization error;
• outputting a first analog intermediate output signal from the first stage and a second analog intermediate output signal from the second stage;
• and
• combining the first and second analog intermediate output signals to provide an amplified output signal.

A Class D amplifier, comprising:

• a first stage including
• an input node coupled to receive an analog input signal,
• an analog to digital converter configured to convert the analog input signal to a digital input signal, and
• a first switching circuit configured to output a first analog intermediate output signal in response to receiving a digital pulse width modulated signal that is based on the digital input signal;
• a plurality of cascaded stages coupled to the first stage, each of the cascaded stages configured to:
• receive a pulse width modulation quantization error of a previous stage to which the stage is directly coupled,
• scale the pulse width modulation quantization error by a gain factor to produce scaled pulse width modulation quantization errors of the previous stage, and
• output a respective analog intermediate output signal based on the scaled pulse width modulation quantization errors of the previous stage;
• and
• a summation circuit configured to combine the analog intermediate output signals to generate an amplified output signal.