3D chip stack skew reduction with resonant clock and inductive coupling
AssigneeInternational Business Machines Corporation
InventorsJae-Joon Kim, Yu-Shiang Lin, Liang-Teck Pang, Joel A. Silberman
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Abstract
There is provided a clock distribution network for synchronizing global clock signals within a 3D chip stack having two or more strata. The clock distribution network includes a plurality of clock distribution circuits, each being arranged on a respective one of the two or more strata for providing the global clock signals to various chip locations. Each of the plurality of clock distribution circuits includes a resonant circuit for providing stratum-to-stratum coupling for the clock distribution network. The resonant circuit includes at least one capacitor and at least one inductor.
Claims5
A method for synchronizing global clock signals in a clock distribution network in a 3D chip stack having two or more strata, the method comprising:
- arranging each of a plurality of clock distribution circuits on a respective one of the two or more strata to provide the global clock signals to various chip locations;
- configuring a respective resonant circuit included in each of the plurality of clock distribution circuits to provide stratum-to-stratum coupling for the clock distribution network, the resonant circuit including at least one capacitor and at least one inductor.
A method for synchronizing global clock signals in a clock distribution network in a 3D chip stack having two or more strata, the method comprising:
- arranging each of a plurality of clock grids on a respective one of the two or more strata to provide the global clock signals to various chip locations;
- arranging each of a plurality of buffered clock trees on the respective one of the two or more strata to drive a respective one of the plurality of clock grids on a same one of the two or more strata, each of the plurality of buffered clock trees having at least a root and a plurality of clock buffers;
- arranging each of a plurality of multiplexers on the respective one of the two or more strata, the plurality of multiplexers being configured to provide a same single clock source to the root of each of the plurality of buffered clock trees;
- and
- configuring a resonant circuit included in each of the plurality of clock grids to provide stratum-to-stratum coupling for the clock distribution network.
Dependencies are inferred from the claim text.