US 8,575,989 B1Granted

High isolation switch

AssigneeFreescale Semiconductor, Inc.

InventorsDouglas A. Garrity, Chunhe Zhao

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Abstract

A switch is provided. The circuit includes a plurality of transistors configured to electrically isolate the input of the switch from the output of the switch. In one embodiment, for example, the plurality of transistors may be configured to provide at least one path between the input and the output of the switch, and to provide at least three layers of electrical isolation between the input and the output of the switch when the switch is open.

Claims18

Dependent claims

A switch having an input and an output, comprising:

a plurality of transistors, wherein the plurality of transistors are configured to provide at least one paths between the input and the output of the switch and wherein the plurality of transistors are configured to provide at least three layers of electrical isolation between the input and the output of the switch along the at least one path when the switch is open,
wherein the at least one path comprises:
a first transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the first transistor is configured to be coupled to the input of the switch;
a second transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the second transistor is configured to be coupled to the second current electrode of the first transistor;
and
a third transistor having a control electrode, a first current electrode and a second current electrode, wherein the second current electrode of the third transistor is configured to be coupled to the second current electrode of the second transistor and the first current electrode of the third transistor is configured to be coupled to the output of the switch,
wherein the switch is configured to receive a first reference voltage and the plurality of transistors further comprises:
a fourth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fourth transistor is configured to be coupled to the first current electrode of the first transistor and the second current electrode of the fourth transistor is configured to be coupled to the control electrode of the first transistor;
a fifth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fifth transistor is configured to be coupled to the first reference voltage and the second current electrode of the fifth transistor is configured to be coupled to the control electrode of the first transistor;
a sixth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the sixth transistor is configured to be coupled to the first reference voltage and the second current electrode of the sixth transistor is configured to be coupled to the second current electrode of the first transistor;
and
a seventh transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the seventh transistor is configured to be coupled to the first reference voltage and the second current electrode of the seventh transistor is configured to be coupled to the second current electrode of the second transistor.

9 more elements

A switch configured to receive an input signal, the switch comprising:

a path between an input of the switch and an output of the switch, the path comprising:
a first transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the first transistor is configured to be coupled to an input of the switch;
a second transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the second transistor is configured to be coupled to the second current electrode of the first transistor;
and
a third transistor having a control electrode, a first current electrode and a second current electrode, wherein the second current electrode of the third transistor is configured to be coupled to the second current electrode of the second transistor and the first current electrode of the third transistor is configured to be coupled to an output of the switch;
a plurality of electrically isolating transistors, comprising:
a fourth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fourth transistor is configured to be coupled to the first current electrode of the first transistor and the second current electrode of the fourth transistor is configured to be coupled to the control electrode of the first transistor;
a fifth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fifth transistor is configured to be coupled to the first reference voltage and the second current electrode of the fifth transistor is configured to be coupled to the control electrode of the first transistor;
a sixth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the sixth transistor is configured to be coupled to the first reference voltage and the second current electrode of the sixth transistor is configured to be coupled to the second current electrode of the first transistor;
and
a seventh transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the seventh transistor is configured to be coupled to the first reference voltage and the second current electrode of the seventh transistor is configured to be coupled to the second current electrode of the second transistor.

8 more elements

Dependencies are inferred from the claim text.

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Abstract

A switch having an input and an output, comprising:

a plurality of transistors, wherein the plurality of transistors are configured to provide at least one paths between the input and the output of the switch and wherein the plurality of transistors are configured to provide at least three layers of electrical isolation between the input and the output of the switch along the at least one path when the switch is open,
wherein the at least one path comprises:
a first transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the first transistor is configured to be coupled to the input of the switch;
a second transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the second transistor is configured to be coupled to the second current electrode of the first transistor;
and
a third transistor having a control electrode, a first current electrode and a second current electrode, wherein the second current electrode of the third transistor is configured to be coupled to the second current electrode of the second transistor and the first current electrode of the third transistor is configured to be coupled to the output of the switch,
wherein the switch is configured to receive a first reference voltage and the plurality of transistors further comprises:
a fourth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fourth transistor is configured to be coupled to the first current electrode of the first transistor and the second current electrode of the fourth transistor is configured to be coupled to the control electrode of the first transistor;
a fifth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the fifth transistor is configured to be coupled to the first reference voltage and the second current electrode of the fifth transistor is configured to be coupled to the control electrode of the first transistor;
a sixth transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the sixth transistor is configured to be coupled to the first reference voltage and the second current electrode of the sixth transistor is configured to be coupled to the second current electrode of the first transistor;
and
a seventh transistor having a control electrode, a first current electrode and a second current electrode, wherein the first current electrode of the seventh transistor is configured to be coupled to the first reference voltage and the second current electrode of the seventh transistor is configured to be coupled to the second current electrode of the second transistor.

9 more elements