Through-silicon vias for semicondcutor substrate and method of manufacture

A semiconductor component comprising:

• a substrate having a top surface;
• an opening extending from the top surface into the substrate, wherein the opening comprises an interior surface;
• a first dielectric liner having a first stress disposed on the interior surface of the opening;
• a second dielectric liner having a second stress disposed on the first dielectric liner, wherein a direction of the first stress is opposite a direction of the second stress;
• a third dielectric liner having a third stress disposed on the second dielectric liner, wherein a direction of the third stress is equal to the direction of the first stress;
• and
• a conductive material disposed on within the third dielectric liner.

A method for forming a semiconductor component comprising:

• providing a semiconductor substrate having a top surface;
• forming an opening having an interior surface extending from the top surface into the semiconductor substrate, wherein the opening has a top portion and a bottom portion;
• depositing a first dielectric liner on the interior surface by a plasma enhanced chemical vapor deposition (PECVD);
• depositing a second dielectric liner on the first dielectric liner by a conformal deposition;
• depositing a third dielectric liner on the second dielectric liner by a PECVD;
• depositing a metal barrier layer on the third dielectric liner;
• and
• filling the remaining opening after the deposition of the three dielectric liners and the metal barrier layer with a conductive material.

A semiconductor component comprising:

• a substrate having a top surface;
• an opening extending from the top surface into the substrate, wherein the opening comprises an interior surface;
• a first dielectric liner having a first stress disposed over the interior surface of the opening;
• a second dielectric liner having a second stress disposed over the first dielectric liner, wherein a direction of the first stress is opposite a direction of the second stress;
• a metal barrier disposed over the second dielectric liner;
• and
• a conductive material disposed over the metal barrier.