US 8,575,716 B2 · Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation

Abstract

A method of forming memory array and peripheral circuitry isolation includes chemical vapor depositing a silicon dioxide-comprising liner over sidewalls of memory array circuitry isolation trenches and peripheral circuitry isolation trenches formed in semiconductor material. Dielectric material is flowed over the silicon dioxide-comprising liner to fill remaining volume of the array isolation trenches and to form a dielectric liner over the silicon dioxide-comprising liner in at least some of the peripheral isolation trenches. The dielectric material is furnace annealed at a temperature no greater than about 500° C. The annealed dielectric material is rapid thermal processed to a temperature no less than about 800° C. A silicon dioxide-comprising material is chemical vapor deposited over the rapid thermal processed dielectric material to fill remaining volume of said at least some peripheral isolation trenches. Other aspects are disclosed, including integrated circuitry resulting from the disclosed methods and integrated circuitry independent of method of manufacture.

Claims27

Dependent claims

An integrated circuit device, comprising:

memory array circuitry trench isolation within a memory array region and peripheral circuitry trench isolation within a region peripheral to the memory array region, the memory array trench isolation comprising a first silicon dioxide-comprising liner and a second silicon dioxide-comprising material laterally inward of the first silicon dioxide-comprising liner, the peripheral trench isolation comprising a third silicon dioxide-comprising liner and a fourth silicon dioxide-comprising material laterally inward of the third silicon dioxide-comprising liner;
and
the second silicon dioxide-comprising material of the memory array trench isolation having an elevationally outermost portion of greater density than an elevationally inner portion, the fourth silicon dioxide-comprising material of the peripheral trench isolation being of uniform density that is the same as the density of the elevationally outermost portion of the second silicon dioxide-comprising material of the memory array trench isolation.

Dependencies are inferred from the claim text.

Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation

Life of this patent

Integrated circuit devices and methods of forming memory array and peripheral circuitry isolation

Life of this patent

Abstract

Claims27