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US 8,575,707 B2Granted
Semiconductor power device having a super-junction structure
AssigneeRenesas Electronics Corporation
InventorsTomohiro Tamaki, Yoshito Nakazawa
Life of this patent
Estimating the term…
Abstract
In a semiconductor power device such as a power MOSFET having a super-junction structure in each of an active cell region and a chip peripheral region, an outer end of a surface region of a second conductivity type coupled to a main junction of the second conductivity type in a surface of a drift region of a first conductivity type and having a concentration lower than that of the main junction is located in a middle region between an outer end of the main junction and an outer end of the super-junction structure in the chip peripheral region.
Claims19
A semiconductor device, comprising:
- (a) a semiconductor chip having a first main surface provided with a source electrode of a power MOSFET and a second main surface provided with a drain electrode of the power MOSFET;
- (b) a drift region of a first conductivity type provided in substantially the entire first main surface of the semiconductor chip;
- (c) a substantially rectangular active cell region provided substantially at a middle portion of the first main surface, peripheral side regions provided outside the active cell region along individual sides of the active cell region, and peripheral corner regions provided between adjacent peripheral side regions;
- (d) a first super-junction structure having a first orientation and provided in substantially the entire surface of the cell region and in the drift region;
- (e) second and third super-junction structures each having substantially the same width and orientation as those of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction of the first orientation of the first super-junction structure so as to be coupled to the first super-junction structure;
- (f) fourth and fifth super-junction structures each having an orientation substantially orthogonal to that of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction orthogonal to the first orientation of the first super-junction structure;
- (g) a main junction region of a second conductivity type which is at an outer end portion of the active cell region and provided in a surface of the drift region so as to surround the active cell region;
- and
- (h) a surface resurf region of the second conductivity type provided in the surface of the drift region so as to be coupled to an outer end of the main junction region and surround the main junction region,
- wherein, for each of the peripheral side regions, in plan view, an outer end of the surface resurf region is located at or near a middle between the outer end of the main junction region and an outer end of a peripheral super-junction region formed of the second to fifth super-junction structures.
7 more elements
A semiconductor device, comprising:
- (a) a semiconductor chip having a first main surface provided with a source electrode of a power MOSFET and a second main surface provided with a drain electrode of the power MOSFET;
- (b) a drift region of a first conductivity type provided in substantially the entire first main surface of the semiconductor chip;
- (c) a substantially rectangular active cell region provided substantially at a middle portion of the first main surface, peripheral side regions provided outside the active cell region along individual sides of the active cell region, and peripheral corner regions between adjacent peripheral side regions;
- (d) a first super-junction structure having a first orientation and provided in substantially the entire surface of the cell region and in the drift region;
- (e) second and third super-junction structures each having substantially the same width and orientation as those of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction of the first orientation of the first super-junction structure so as to be coupled to the first super-junction structure;
- (f) fourth and fifth super-junction structures each having an orientation substantially orthogonal to that of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction orthogonal to the first orientation of the first super-junction structure;
- (g) a main junction region of a second conductivity type which is at an outer end portion of the active cell region and provided in a surface of the drift region so as to surround the active cell region;
- (h) a surface resurf region of the second conductivity type provided in the surface of the drift region so as to be coupled to an outer end of the main junction region and surround the main junction region;
- and
- (i) a plurality of corner-portion super-junction structures, each corner-portion super-junction structure being provided in a respective one of the peripheral corner regions such that said corner-portion super-junction structure is substantially line-symmetrical with respect to a diagonal line of the semiconductor chip extending through the corner-portion super-junction structure so as to divide the peripheral corner region into two subregions,
- wherein the subregions adjacent to one of the fourth and fifth super-junction structures have substantially the same width and orientation as those of the fourth super-junction structure, and
- the subregions adjacent to one of the second and third super-junction structures have substantially the same width and orientation as those of the second super-junction structure.
9 more elements
A semiconductor device, comprising:
- (a) a semiconductor chip having a first main surface provided with a source electrode of a power MOSFET and a second main surface provided with a drain electrode of the power MOSFET;
- (b) a drift region of a first conductivity type provided in substantially the entire first main surface of the semiconductor chip;
- (c) a substantially rectangular active cell region provided substantially at a middle portion of the first main surface, peripheral side regions provided outside the active cell region along individual sides of the active cell region, and peripheral corner regions provided between adjacent peripheral side regions;
- (d) a first super-junction structure having a first orientation and provided in substantially the entire surface of the cell region and in the drift region;
- (e) second and third super-junction structures each having substantially the same width and orientation as those of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction of the first orientation of the first super-junction structure so as to be coupled to the first super-junction structure;
- (f) fourth and fifth super-junction structures each having an orientation substantially orthogonal to that of the first super-junction structure and provided in the drift region of each of the peripheral side regions on opposite sides of the active cell region in a direction orthogonal to the first orientation of the first super-junction structure;
- (g) a main junction region of a second conductivity type which is at an outer end portion of the active cell region and provided in a surface of the drift region so as to surround the active cell region;
- (h) a surface resurf region of the second conductivity type provided in the surface of the drift region so as to be coupled to an outer end of the main junction region and surround the main junction region;
- and
- (i) a corner-portion super-junction structure provided in each of the peripheral corner regions, having substantially the same width and orientation as those of the fourth super-junction structure,
- wherein each corner-portion super-junction structure is trimmed at an outer portion thereof such that a length of columns of the corner-portion super-junction varies in the direction orthogonal to the first orientation so as to leave an outer portion of each peripheral corner region without a super-junction structure.
8 more elements
Dependencies are inferred from the claim text.