Lateral super junction device with high substrate-drain breakdown and built-in avalanche clamp diode
AssigneeAlpha and Omega Semiconductor Incorporated
InventorsMadhur Bobde, Anup Bhalla, Hamza Yilmaz, Wilson Ma, Lingpeng Guan, Yeeheng Lee, John Chen
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Abstract
This invention discloses configurations and methods to manufacture lateral power device including a super-junction structure with an avalanche clamp diode formed between the drain and the gate. The lateral super-junction structure reduces on-resistance, while the structural enhancements, including an avalanche clamping diode and an N buffer region, increase the breakdown voltage between substrate and drain and improve unclamped inductive switching (UIS) performance.
Claims18
A semiconductor power device comprising:
- a semiconductor substrate comprising a super-junction structure including a plurality of alternating P-doped and N-doped layers extending laterally from a source column to a drain column wherein said trench source column and drain column extend downward in said semiconductor substrate through two opposite sides of said super-junction structure disposed in said semiconductor substrate;
- a gate column for applying a voltage thereon to control a current transmitted laterally through said super-junction structure between said source and said drain columns;
- wherein the semiconductor substrate is a P substrate and wherein the drain column are N+ columns to form a Zener diode at a junction of said drain column with said P substrate to function as a built-in avalanche clamp diode;
- and
- a buried doped region disposed in said semiconductor substrate below the drain column to increase an effective radius below the drain column for suppressing an electrical field crowding.
A method for manufacturing a semiconductor power device on a semiconductor substrate comprising:
- forming alternating P type and N type layers over a P substrate, the alternating P type and N type layers being charge balanced to function as a lateral super junction structure;
- forming a P gate column through said lateral super junction structure reaching the P substrate;
- and
- forming N source and N drain columns in through said lateral super junction structure;
- and
- forming an avalanche clamping diode between the bottom of the N drain column and the P substrate, the avalanche clamping diode diverting avalanche current away from the super junction structure.
A method for manufacturing a semiconductor power device on a semiconductor substrate comprising:
- forming alternating P type and N type layers over a P substrate, the alternating P type and N type layers being charge balanced to function as a lateral super junction structure;
- forming a P gate column through said lateral super junction structure reaching the P substrate;
- and
- forming N source and N drain columns in through said lateral super junction structure;
- and
- forming an N buffer layer under the N drain column to reduce the electric field crowding under the N drain column.
Dependencies are inferred from the claim text.