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US 8,575,634 B2Granted
Chip package and method for fabricating the same
OwnerTsang-Yu Liu, Yu-Lin Yen +2inventors
InventorsTsang-Yu Liu, Yu-Lin Yen, Chuan-Jin Shiu, Po-Shen Lin
Life of this patent
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Abstract
The present invention provides a chip package, including: a chip having a semiconductor device thereon; a cap layer over the semiconductor device; a spacer layer between the chip and the cap layer, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the chip and the cap layer; and an anti-reflective layer between the cap layer and the chip, wherein the anti-reflective layer has a overlapping region with the spacer layer and extends into the cavity. Furthermore, a method for fabricating a chip package is also provided.
Claims21
A chip package, comprising
- a chip having a semiconductor device thereon;
- a cap layer over the semiconductor device;
- a spacer layer between the chip and the cap layer, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the chip and the cap layer;
- an anti-reflective layer formed between the cap layer and the spacer layer and located only a side of the chip, wherein the anti-reflective layer has an overlapping region with the spacer layer and extends into the cavity;
- and
- an adhesive layer disposed between the anti-reflective layer and the spacer layer or between the spacer layer and the cap layer.
3 more elements
A method for fabricating the chip package, comprising:
- providing a cap layer and a wafer including a plurality of chips, wherein each of the chips has a semiconductor device thereon;
- bonding the cap layer and the wafer with a spacer layer and an anti-reflective layer therebetween, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the cap layer and the chip, and the anti-reflective layer is on only a side of the chip and extends to the cavity, wherein the anti-reflective layer has an overlapping region with the spacer layer, wherein bonding the cap layer and the wafer comprises:
- forming the spacer layer on the chip;
- forming the anti-reflective layer on the cap layer;
- and
- bonding the spacer layer and the anti-reflective layer through an adhesive layer.
3 more elements
A chip package, comprising:
- a chip having a semiconductor device thereon;
- a cap layer over the semiconductor device;
- a spacer layer between the chip and the cap layer, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the chip and the cap layer;
- and
- an anti-reflective layer formed between the cap layer and only a side of the chip, wherein the anti-reflective layer has an overlapping region with the spacer layer and extends into the cavity, wherein the space layer is disposed between the anti-reflective layer and the cap layer.
2 more elements
A chip package, comprising:
- a chip having a semiconductor device thereon;
- a cap layer over the semiconductor device;
- a spacer layer between the chip and the cap layer, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the chip and the cap layer;
- and
- an anti-reflective layer formed between the cap layer and only a side of the chip, wherein the anti-reflective layer has an overlapping region with the spacer layer and extends into the cavity, wherein the anti-reflective layer comprises a plurality of films which absorb lights of different wavelengths.
2 more elements
A method for fabricating the chip package, comprising:
- providing a cap layer and a wafer including a plurality of chips, wherein each of the chips has a semiconductor device thereon;
- bonding the cap layer and the wafer with a spacer layer and an anti-reflective layer therebetween, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the cap layer and the chip, and the anti-reflective layer is on only a side of the chip and extends to the cavity, wherein the anti-reflective layer has an overlapping region with the spacer layer, wherein bonding the cap layer and the wafer comprises:
- forming the anti-reflective layer on the cap layer;
- forming the spacer layer on and partially covering the anti-reflective layer, and bonding the spacer layer to the chip through an adhesive layer.
1 more element
A method for fabricating the chip package, comprising:
- providing a cap layer and a wafer including a plurality of chips, wherein each of the chips has a semiconductor device thereon;
- bonding the cap layer and the wafer with a spacer layer and an anti-reflective layer therebetween, wherein the spacer layer surrounds the semiconductor device and forms a cavity between the cap layer and the chip, and the anti-reflective layer is on only a side of the chip and extends to the cavity, wherein the anti-reflective layer has an overlapping region with the spacer layer, wherein bonding the cap layer and the wafer comprises:
- forming the spacer layer on the cap layer;
- conformally forming the anti-reflective layer on the spacer layer and the chip;
- and bonding the anti-reflective layer to the spacer layer and the chip through an adhesive layer.
2 more elements
Dependencies are inferred from the claim text.